Semiconductor Assembly Process Technology Development Senior Engineer

Job description

You will be responsible for technology development tasks in the assembly and packaging of advanced semiconductor packages for AI, HPC (High Performance Computing), automotive, and IoT advanced semiconductor packages (such as Flip Chip Ball Grid Array and Power Semiconductor Packages).

Development, equipment selection, and implementation of assembly technologies for advanced packages such as VPS, FCCSP, and FCBGA Development and improvement of materials and processes for assembly processes (SMT, SPI, AOI, Flip Chip bonding, Flux cleaning)

• Support for Launching and Transitioning to Mass Production Lines
• Process quality and yield improvement activities Ou company is driving innovation in semiconductor packaging technologies including Flip Chip, SiP, VPS, FCCSP, and FCBGA.

As demand continues to grow in AI, HPC, automotive, and IoT applications, advanced packages with higher density, improved thermal performance, and greater reliability are becoming increasingly important. To support the rapid expansion of these technologies, we are seeking experienced engineers in semiconductor assembly and packaging processes. In this role, you will contribute to the development of next-generation packages for AI/HPC, ADAS, and other advanced applications, from package design and process development to product launch.

This is an excellent opportunity to work on cutting-edge semiconductor technologies and play a key role in shaping future innovations.

Qualifications

Required Qualifications

Over

• 5 years of experience in technology development in semiconductor back-end processes (assembly and packaging) Over
• 5 years of technical development experience in any of the following processes: SMT, SPI, AOI, Flip Chip bonding, or Flux cleaning Practical experience in process improvement, quality control, and equipment introduction Technical Degrees (mechanical, materials, electronics, chemistry, etc.) Business-level proficiency in both Japanese and English Preferred Qualifications: Practical experience in analyzing and improving defects using FTA, 5Whys, etc. in subsequent processes Experience in materials development such as material selection and optimization Experience in CAD design, including jigs and tool design and optimization
• Knowledge of semiconductor technology standards such as IATF and JEDEC Practical experience as PM in product development