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Renesas Electronics · Noida, India

Principal Engineer

Noida, IndiaFull-timeSenior individual contributorOperations

Listed on Renesas Electronics’s official careers site. Posted March 5, 2025. Check that it is still open and apply there.

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Job description

Emulation Engineer [Location

Noida] Experince: 10-20 Years Job Description [ Location: NOIDA] We are seeking a diligent Emulation leader to join our team at Renesas. Responsibilities include enhancing build/debug emulation methodology and flows, develop capabilities to run simulation testbench with emulation build, working with design/verification teams for XTOR building, selecting hardware, interfacing with software/platform teams, and setting high-level technical vision, along with executing the system-level-scenarios to ensure the quality (zero-bug) silicon tape-out.

Responsibilities

  • Create full chip emulation and FPGA prototype models for the complex automotive SoC designs
  • Create the test sanity suite to validate the models, having various integrated transactors and memory models
  • Develop and apply automation aids, flows and scripts to improve emulation ease of use for the users Innovate improvements to emulation methodology, working with partners across other geographies
  • Train and mentor engineers to deliver high quality and increase productivity
  • Build strong collaboration with other R&D teams such as Design, Verification, digital IP, Design Enablement, and Validation to achieve project milestones Drive SoC verification using emulation (Hardware Assisted Verification), includes working with design, system-architect, verification teams to develop and execute the test plans for system-level-scenarios on emulation/prototype platform
  • Work with the EDA vendors to deploy next generation emulation technologies

Qualifications

Qualifications

M.Tech/B.Tech Degree in Electrical/Electronic Engineering and a minimum of 4+ years relevant industry experience Emulation experience on any/all available platforms (Palladium, Protium, Veloce or Zebu, EP) including design bring-up, build flow, debug, performance and throughput tuning Experience with Verilog, VHDL complex SoC design Experience with System Verilog, UVM, C/C++ verification environment

  • Knowledge of communication/interface protocols would be a plus: MIPI (CSI/DSI), PCIe, UCIe, ENET, LPDDR5/4, Hyper/Octal Flashes, eMMC, SD, UFS Knowledge of DFT and GLE flows would be a plus Know-How of the AI workload and its performance aspects would be a big plus
  • Proficient in writing scripts using any languages (Perl, TCL, bash, Python) Experience with waveform debug tools, simvision/Verdi
  • Strong communication skills and ability to work as a team

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