Engineer/Staff Engineer – Multi-Dies Physical Verification Engineer

Job description

Join the MediaTek Chip Physical Verification team and help create technology for products that will delight and inspire millions of people every day. As a member of our team, you will define and enable physical sign-off flows and solutions for SoC and Multi-Dies (3D IC) design, ensuring first-time success in product tape-out. In this role, you will develop and implement technologies at advanced process nodes, contributing to the success of cutting-edge products.

Job Responsibilities

• Responsible for Multi-Dies Physical Verification Sign-off in area of (3D_Stack, 3D_PERC, 3D_ANT) for tape-out.
• Co-work with Package Design Team to resolve Multi-Dies integration issues.
• Co-work with ESD Team to run 3D_PERC flow.
• Coordinates with Chip PV Team on active dies related issues (DRC, LVS, ANT, ERC, ESD)
• Provide automation solutions to improve efficiency in tape-out flow.
• Report on Tapeout PV issues. #LI-WC1