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Cadence Design · PUNE

Lead Design Engineer

PUNEManager or leadDesign

Listed on Cadence Design’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there.

Apply on Cadence Design’s careers site →

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. 3++ Year ASIC Design / Verification experience. Required Expertise in PCIe / Storage (ONFI, XSPI, SD/eMMC) Design and Verification domain. Good debug skills and good communication skills. We’re doing work that matters. Help us solve what others can’t.

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