All Advanced Micro Devices (AMD) jobs, page 6 of 13
1,273 jobs listed on Advanced Micro Devices (AMD)’s official careers site. Each links to its own page with the description and the employer’s application link.
- Manager, SOC Product & Test Engineering Austin, Texas
- Manager, Silicon Diagnostics & Validation Singapore
- Manufacturing Quality Process Program Manager Austin, Texas
- Mask Layout Designer California, United States
- Materials Specialist Taipei, Taiwan
- Mathematical/Statistical Software Engineer Manchester, United Kingdom
- Mechanical Engineer San Jose, California
- Mechanical Engineer, AI Computing Hardware (Servers, Rack-Level Systems) Secaucus, New Jersey
- Memory PHY - Technical Lead MARKHAM, Canada
- Memory PHY - Technical Lead MARKHAM, Canada
- Memory PHY Firmware Architect Santa Clara, California
- Memory PHY Principal Design Engineer Santa Clara, California
- Memory/SSD Engineer Shenzhen, China
- Microprocessor VLSI Physical Design Engineer Fort Collins, Colorado
- NPU Compiler Engineer San Jose, California
- Next Gen CPU Power Management RTL Design Engineer Santa Clara, California
- OSAT Execution Program Manager Hsinchu, Taiwan
- OSAT Execution Program Manager Hsinchu, Taiwan
- Open BMC - System Software Developer Hyderabad, India
- Open BMC - System Test Architect Hyderabad, India
- P4 Compiler Engineer - DPU Santa Clara, California
- PCIe, CXL and Highspeed IO Validation Engineer Santa Clara, California
- PD Architect Bangalore, India
- PD CAD Engineer Hyderabad, India
- PD CAD Engineer Hyderabad, India
- PD Clocking Engineer Bangalore, India
- PD Leadership role Bangalore, India
- PD PNR Engineer Bangalore, India
- PD PNR Engineer Bangalore, India
- PD PNR Engineer Bangalore, India
- PD Power Lead Bangalore, India
- PD Timing lead Bangalore, India
- PLL Design/ Integration Sr Staff Engineer San Jose, California
- PMTS - DFT Architect Bangalore, India
- PMTS Product Development Eng. Penang, Malaysia
- PNR CAD Silicon Design Engineer Hyderabad, India
- PNR CAD Silicon Design Engineer Hyderabad, India
- Packaging Design Engineer Austin, Texas
- Packaging Engineer Bangalore, India
- Packaging Engineer Bangalore, India
- Packaging Engineer Hsinchu, Taiwan
- Packaging Engineer Hsinchu, Taiwan
- Packaging Engineer Hsinchu, Taiwan
- Packaging Engineer Suzhou, China
- Packaging Engineer, Substrate Hsinchu, Taiwan
- Paralegal, Real Estate Austin, Texas
- Partner Manager - Supermicro Munich, Germany
- Partner Manager - Supermicro Tokyo, Japan
- Partner Marketing Manager, Google and Oracle Santa Clara, California
- Performance Modeling and Optimization Engineering Director Bangalore, India
- Photonic Design Manager San Jose, California
- Physical AI, Computer Vision Engineer Austin, Texas
- Physical Design Engineer Bangalore, India
- Physical Design Engineer MARKHAM, Canada
- Physical Design Engineer MARKHAM, Canada
- Physical Design Engineer VANCOUVER, Canada
- Physical Design Lead Hyderabad, India
- Physical Design Lead Hyderabad, India
- Physical Design Lead - CPU Team Bangalore, India
- Physical Design Lead with STA Hyderabad, India
- Physical Design Lead with STA Hyderabad, India
- Physical Design Lead with STA Hyderabad, India
- Physical Design Lead(High Speed IP's) Bangalore, India
- Physical design architecture Bangalore, India
- Platform / System Debug Validation Engineer Austin, Texas
- Platform Architect – BIOS/Firmware & Customer Enablement Bangalore, India
- Platform Engineer San Jose, California
- Platform System Architect Austin, Texas
- Platform Validation Engineer - GPU Penang, Malaysia
- Platform Validation Engineer - RAS Penang, Malaysia
- Platform Validation Lead - IO Interfaces Austin, Texas
- Post Silicon High-Speed I/O Validation Engineer Austin, Texas
- Post Silicon Validation Manager Bangalore, India
- Post-Silicon Memory Subsystem Validation Engineer Austin, Texas
- Post-Silicon Power and Performance Staff Engineer Penang, Malaysia
- Post-Silicon Validation Engineer Fort Collins, Colorado
- Post‑Silicon SoC & System‑Level Validation Engineer Bangalore, India
- Power Analysis and Optimization Engineer Austin, Texas
- Power IP and System Validation Engineer Austin, Texas
- Power Management Systems Engineer Austin, Texas
- Power Methodology and Modelling Engineer Santa Clara, California
- Power Modeling Architect (CPU/GPU Accelerators) Austin, Texas
- Power Solution Engineer Shenzhen, China
- Pre-Silicon Power Management Engineer Austin, Texas
- Pre-silicon Validation Engineer - Emulation Bangalore, India
- Pre‑Silicon Power Modeling Leader — x86 SoCs Austin, Texas
- Pricing Strategy Manager Austin, Texas
- Principal / Senior GPU SW Performance Engineer — Post‑Training San Jose, California
- Principal AI Cluster Performance Validation Engineer Austin, Texas
- Principal AI Software & Systems Architect Austin, Texas
- Principal AI Software Engineer San Jose, California
- Principal ASIC Design Engineer MARKHAM, Canada
- Principal Cache RTL Design - CPU Team Bangalore, India
- Principal Chromium Developer Santa Clara, California
- Principal Cloud & AI Workload Performance Analysis Engineer Texas, United States
- Principal Competitive Analysis, Custom Silicon Architect - DC GPU San Jose, California
- Principal Competitive CPU Microarchitecture & Platform Performance Engineer Texas, United States
- Principal Competitive CPU Performance Forecaster & Data Scientist Texas, United States
- Principal Datacenter Platform Validation Lab Engineer Penang, Malaysia
- Principal Debug Engineer Austin, Texas