網通電源完整性工程師

Job description

We are looking for a power expert who is interested in expanding their expertise from traditional power design into a full ecosystem of power integrity simulation. In this role, you will have the opportunity to learn what power integrity truly means in high-speed system design. You will be able to connect your power design knowledge with advanced power integrity methodologies, build simulation benches, correlate simulation results with measurement data, and help reduce system debugging time during the design cycle.

This position is suitable for engineers with a strong power design background who would like to further develop their capability in PI simulation, system-level power analysis, and AI-assisted engineering workflows.

Responsibilities

• Be responsible for PI-DC simulation using Cadence PowerDC.
• Be responsible for PI-AC simulation using Cadence OptimizePI.
• Work closely with SI engineers to define PCB stackup design from both signal integrity and power integrity perspectives.
• Build regulator models(VRM model) in circuit simulation tools and perform co-simulation with PCB models, including RLC and S-parameter models. The target is to analyze transient voltage drop and voltage ripple.
• Use Python and MATLAB to develop AI-assisted PI techniques that can help the team reduce design cycle time and improve simulation efficiency.

Preferred Background

• Experience in power design, voltage regulator design, or board-level power architecture.
• Basic understanding of PCB design, power distribution network, decoupling capacitor design, and voltage ripple behavior.
• Familiarity with simulation tools such as Cadence PowerDC, OptimizePI, Sigrity, SPICE, MATLAB, or Python is a plus.
• Interest in learning signal integrity and power integrity methodology for high-speed systems.
• Strong problem-solving mindset and willingness to connect design, simulation, and measurement results.