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Western Digital · San Jose, CA

Quantum Compute Nanofabrication Engineer

San Jose, CA, United StatesFull-timeOperations

Listed on Western Digital’s official careers site. Posted October 9, 2026. Check that it is still open and apply there.

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Job description

We are seeking a talented researcher to join our team and drive innovative research projects in quantum computing, specifically to focus on quantum compute devices nanofabrication. The key emphasis of the project will be design and nanofabrication of superconducting qubit and QPU test devices, intended for thorough understanding of the links between nanofabrication choices and devices performance, as applied to both flux tunable and fixed frequency qubits nanofabricated in various Al, Nb and Ta-based superconducting qubit systems.

The overarching goal of the project is to translate exceptional process uniformity abilities in Western Digital into exceptional resonator and qubit performance uniformity across the wafer, and from wafer to wafer. In the course of the project, you will collaborate with both room temperature and low temperature DC and RF metrology scientists to accurately measure and monitor realistic population lifetime distributions, and materials scientist working on wafer level characterization, and drive feedback to our quantum device design and implement nanofabrication process.

Successful candidates are expected to have deep familiarity with superconducting qubit design, and variety of nanofabrication techniques typically applied to superconducting qubit devices, such as optical and e-beam lithography, reactive ion etching, chemically assisted ion beam etching, atomic layer etching, physical vapor deposition, chemical vapor deposition, ion beam deposition and other.

ESSENTIAL DUTIES AND RESPONSIBILITIES

Lead and execute research projects in quantum computing superconducting qubit design and nanofabrication from wafer level nanofabrication, to device packaging, and collaborating with measurement teams in implementing design and nanofabrication process changes to drive continuous improvement Experience in chip to wafer bonding with superconducting bumps is welcome Collaborate with product teams to tackle novel challenges and develop innovative solutions.

Collaboration

Stay current with industry and academic trends, publishing papers and presenting at conferences.

Reporting

Develop and present detailed reports and visualizations to communicate findings, trends, and actionable insights to stakeholders at all levels.

Motivation

Highly self-motivated problem solver able to thrive in unstructured environment. Ability to independently pursue fundamental research, including paper writing and publishing.

Communication

Excellent written and verbal communication skills, with the ability to present complex data and insights clearly to both technical and non-technical audiences.

Analytical Skills

Demonstrated ability to quickly grasp and address challenges outside of immediate field of expertise.

Qualifications

Required

Ph.D degree and post-doctoral experience in Physics, Electrical Engineering, Materials Science with focus on experimental work on superconducting qubit design, nanofabrication and metrology Thorough understanding of superconducting qubit design theory Experience in nanofabrication methods for superconducting qubits Experience in wafer level metrology, including SEM, TEM, AFM, XPS Proficiency in a wide array of programming languages, like Python, Rust, TCL, or C, and the ability to choose the right one for the task, including knowledge (or willingness to acquire knowledge) of FPGA based microcontrollers

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