Senior Mixed Signal DV Engineer

Job description

Change the world. Love your job. Texas Instruments is seeking Design Verification Engineer. In this role you will confirm the accuracy of designs for analog and mixed signal electronic parts, components, or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems before pattern generation/mask development. The role will require working independently from the product development team who designed the devices to confirm adherence to known design rules, procedures, and best practices.

Additional job functions include analyzing equipment to establish operating data and conducting experimental tests and evaluating results to confirm the device meets all requirements in the specifications. You may also run software simulations, selecting components and equipment based on analysis of specifications and reliability. As a Design Verification Engineer you may also review vendor capability to support product development.

Requires a BS degree or equivalent experience in the design of equipment, components or circuitry. Who are we and what do we do? The Advanced Circuits and Power Solutions business is known for delivering industry-leading custom IC system solutions, including display and touch power products, charger power products, camera PMICs, power path devices, sensing devices, and high-performance communication interface products.

Our products integrate precision signal chains and highly efficient power components into ultra-small form factors, enabling TI’s best-in-class customers to translate their ideas into high-value products that revolutionize the personal electronics market. In this team, you will work with and learn from incredibly talented technical leaders who have influenced TI’s technology, productivity, and way of working in creative and impactful ways.

You will directly interact with one of TI’s most valued, high-volume customers through intense technical reviews and architecture discussions! By enabling designs that are highly impactful to TI revenue and working with a critical customer on a versatile set of products, you will find yourself on an accelerated career path. About the job If you are looking to join an ingenious, vigorous & ambitious team that consistently delivers groundbreaking technologies into the custom mobile electronics world, here is an opportunity for you!

What will you be doing in this role?

Strategic & Technical Leadership Strategic Leadership

Drive TI's technology roadmap by collaborating with Process, Packaging, EDA, and other key stakeholders both within and outside the company.

Industry Influence

Define and implement industry-leading best practices within TI and represent the company's technical leadership in front of key customers.

Design Governance

Participate in the critical review and sign-off of designs developed within the team as well as cross-product designs across TI.

Cross-Functional Collaboration

Partner closely with Architecture, Design, and Firmware teams to ensure successful product execution.

Verification Strategy & Architecture Verification Strategy

Drive the verification strategy by creating detailed test plans, defining test cases, checkers, and coverage metrics. Develop comprehensive, coverage-driven verification plans in close collaboration with System, Application, and Design teams.

UVM Architecture

Lead the ground-up development of UVM-based verification environments, including the implementation of agents, drivers, monitors, and scoreboards.

Mixed-Signal Methodology

Build and enhance mixed-signal testbenches using a combination of schematics, behavioral models, and RTL.

Mixed-Signal & Modeling Expertise Modeling & Simulation

Create high-fidelity analog behavioral models using Verilog-A, Verilog-AMS, Wreal (RNM), or EENet to enable efficient top-level simulation.

Analog Checkers & Assertions

Implement real-time analog checkers and post-processing checker strategies to ensure functional correctness across domains.

Protocol Expertise

Verify standard communication protocols such as I2C, ASI, SPI, and UART.

Execution, Debug, & Support Full-Cycle Execution

Execute RTL and Gate-Level Simulations (GLS), manage regressions, and track functional and code coverage (Block, Expression, Toggle, FSM) to ensure 100% closure through tape-out.

Technical Debugging

Utilize advanced debugging and problem-solving skills to resolve complex design and testbench issues.

Post-Silicon Support

Collaborate with Product and Application Engineering teams to support ATE functional pattern generation and silicon characterization.

Qualifications

Minimum requirements

Minimum education Master's or Bachelor's degree in electrical engineering Minimum of 12 years of experience Basic Requirements (Must-Haves)

Core Competencies

Strong expertise in SystemVerilog (SV) and UVM methodologies.

Mixed-Signal Modeling

Proficiency in analog behavioral modeling using Verilog-AMS, Verilog-A, or Wreal (RNM).

Mixed-Signal Verification

Direct experience with mixed-signal verification flows involving a combination of schematics, behavioral models, and RTL.

Tooling

Proficiency with Cadence simulation tools (e.g., Xcelium, vManager, JasperGold). Strong command of Cadence Virtuoso, AMS Designer, or equivalent industry-standard mixed-signal simulation and debug environments.

Formal Verification (FV)

Hands-on experience with Formal Property Verification (FPV), connectivity checks, and Unreachability (UNR) analysis for top-level sign-off.

Clock & Reset Domains

Deep understanding of Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) assertions, including the ability to write and debug them.

Low Power Verification

Practical experience with UPF (Unified Power Format) for low-power verification and power-aware simulations.

Communication

Excellent interpersonal skills with the ability to present complex technical analysis and conclusions clearly to global cross-functional experts and business leaders.

Preferred Skills (Innovation & Automation) Automation & Scripting

Proven ability to automate verification flows and data analysis using Python, Perl, or Shell scripting.

Methodology Innovation

Ability to drive advanced verification methodologies and collaborate with EDA vendors to enhance tool capabilities.

Emerging Technologies

Experience or strong interest in implementing AI/ML-driven verification methodologies to improve coverage and efficiency.

Advanced DV Frameworks

Deep familiarity with complex SystemVerilog and UVM-based top-level environments.

Domain Expertise

Experience with signal processing, PMICs (Power Management ICs), or high-speed communication interfaces.

Protocol Proficiency

Hands-on verification experience with standard protocols such as I2C, SPI, UART, or ASI.

Post-Silicon Integration

Experience in silicon debug and collaborating closely with silicon validation teams.

Preferred qualifications

• Ability to establish strong relationships with key stakeholders critical to success, both internally and externally
• Strong verbal and written communication skills
• Ability to quickly ramp on new systems and processes
• Demonstrated strong interpersonal, analytical and problem-solving skills
• Ability to work in teams and collaborate effectively with people in different functions
• Ability to take the initiative and drive for results
• Strong time management skills that enable on-time project delivery