Staff Engineer - ATE

Job description

We are seeking a highly motivated Test Pattern Environment Engineer to develop, maintain, and support the infrastructure used for test pattern generation, conversion, and deployment in silicon validation and ATE production environments.

Key Responsibilities

Post-Silicon ATE Lead to lead and manage post-silicon validation and production testing efforts using ATE platforms. This role requires strong technical expertise in silicon characterization, test development, and working closely with cross-functional teams including design, DFT, packaging, and product engineering. Own and lead post-silicon validation and ATE characterization for silicon devices (SoC/MCU/ASIC). Develop and debug ATE test programs for characterization, qualification, and production ramp-up.

Collaborate with design and DFT teams to define test coverage and validation strategy. Analyze silicon test data to identify functional/parametric failures, yield issues, or corner case behaviours. Lead silicon debug and root cause analysis of test failures. Define and drive test cost optimization strategies (e.g., multisite, parallel test, retest strategy). Work with OSATs and vendors for probe card, loadboard, and socket development.

Define test limits, corner conditions, and environmental conditions (HTOL, AC/DC, ESD, etc.). Support qualification testing (e.g., HTOL, HAST, Temp Cycle) and drive correlation between bench and ATE.

Qualifications

B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or related field. 7+ years of experience in post-silicon validation and ATE development. Strong hands-on experience with ATE platforms (e.g., Teradyne UltraFlex, Advantest 93K, NI STS). Solid understanding of mixed-signal, digital, and analog test methodologies. Experience with scripting (Python, Perl, and C) for automation and data analysis. Familiarity with lab equipment (oscilloscopes, source meters, BERTs, etc.) for correlation and debug.

Excellent problem-solving skills and ability to work across global teams.