Sr Analog Engineer

Job description

This position is in CMSD Korea, which is part of Renesas’ Analog & Connectivity organization. The CMSD R&D team develops and industrializes highly configurable mixed-signal products for a wide range of applications, including but not limited to consumer, communication, computing, data center, industrial, and automotive applications. CMSD team is the pioneer and dominant market leader of the highly successful GreenPAK family of products.

This customer configurable product and platform enables customers to differentiate their products, reduces BOM cost and development cost and time. CMSD team is continuously expanding our product portfolio that includes high performance analog IP’s, DC-DC, and FPGA. Understand the transistor- and system- level architecture. Ensure the performance of the high precision analog block to meet process, voltage, and temperature (PVT) variations.

Contribute to the high-performance silicon-proven IP development. Collaborate with digital engineers on trimming and control for analog circuit. Guide to layout engineer to minimize the layout effects. Perform hands-on evaluation of IPs to use equipment like multimeter and oscilloscope. Collaborate with test engineering to ensure adequate test coverage. Analyze the ATE & CHZ data to validate product specification. Interface and Support with various teams in design view.

Participate in root cause analysis of performance and functional issues. Modeling of analog and mixed-signal circuits for top-level testbench.

Qualifications

• M.D. or Ph.D in EE semiconductor design by using CMOS
• Strong knowledge in design and layout of analog and mixed-signal circuit design and architecture with various blocks such as amplifiers, comparator, bandgap, voltage- and current- generator, oscillator, regulator, data converter, digital logic, etc.
• Strong background of analog and digital IC design, layout, tools, process, measurement.
• Strong understanding of Mixed-Signal design flow and Top-Down development methodology for optimizing PPA (Power, Performance, Area)
• Ability to understand and prove the difference between hand calculation and simulation.
• Experience with simulation tools (Cadence, Verilog, Python etc.)
• Experience in semiconductor reliability and failure analysis.
• Clearly explain the operation of circuits and systems
• Documenting accurately and clearly analysis & conclusion
• Strongly self-motivated and open mind with team working skills.
• Strong English Communication with Design, Characterization, Test Engineering, technical writing team from various countries.