Renesas Electronics · Shanghai, China
Sr Staff Digital Verfication Engineer
Listed on Renesas Electronics’s official careers site. Posted August 31, 2026. Check that it is still open and apply there.
Apply on Renesas Electronics’s careers site →Job description
-Understanding the expected functionality of designs.
- Designing and developing verification environment -Improve the verification architecture and flow -Running RTL and gate-level simulations/regression.
- Code/functional coverage development, analysis and closure.
Qualifications
-Bachelor degree or master degree in CS/ME.
- Minimum of 8 years’ experience.
- Candidate should be familiar with as System Verilog, UVM verification.
- Have Verification experience (test plan, test bench, assertions, debugging designs, code coverage etc.).
- Independent and self-managing.
- Familiar with UVM source code or key UVM mechanism
- Familiar with industry standard verification tools and flow.
- Familiar with basic computer architecture Additional qualifications include:
- Good IC verification skills and basic knowledge of logic and circuit design, good communication and problem solving skills.
- Scripting and automation skills (python) is a plus.
- Familiar with C/C++/Java or any object orientation program language, knowledge of software design pattern is a plus
- Has experience of setup over 100K lines verification environment
- Knowledge of DDR protocol is a plus.
- Knowledge of Mixed signal verification is a plus
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