Qualcomm · Santa Clara, CA

Design Verification Engineer — Memory Subsystem

Santa Clara, California, United States of AmericaDesign

Listed on Qualcomm’s official careers site. Posted September 17, 2026. Check that it is still open and apply there.

Apply on Qualcomm’s careers site →

The employer’s listing has no description we could read. See it on their site.

More jobs at Qualcomm

ASIC Design Verification Engineer (Santa Clara, CA)

Santa Clara, California, United States of America

CPU Physical Design Timing Engineer

Santa Clara, California, United States of America

CPU SRAM Design & Layout Engineer

Santa Clara, California, United States of America

CPU Server Physical Design Clock Engineer

Santa Clara, California, United States of America

Similar jobs at other companies

Mechanical Engineer Design Verification Checker

Lockheed Martin · Englewood, CO, Littleton

Senior Design Verification Engineer - FPGA

BAE Systems · Nashua, New Hampshire, United States

Design Verification Engineer | PI

Texas Instruments · Dallas, TX, United States

Lead Design Verification Engineer-Memory Controller

Advanced Micro Devices (AMD) · San Jose, California

Design Verification Engineer

Microsoft · United States, North Carolina, Raleigh, Texas, Austin

Jobs in Santa Clara, CA Jobs in California Design jobs

OpenNash lists jobs from employers’ own careers sites and does not handle applications. Dates come from the employer where stated; “first seen” and “last checked” are our own observations.