Analog Layout Engineer

Job description

We are seeking a Analog Layout Engineer to join our Image Sensor team. The ideal candidate will have strong expertise in analog and mixed-signal layout design, with the ability to independently own layout blocks and work closely with circuit designers to deliver layouts with quality. #LI-RT1

Responsibilities

Implement layout of analog and mixed-signal blocks including ADCs, PLLs, Bandgaps, References, LDOs, Bias circuits, and image sensor IPs. Perform and resolve DRC, LVS, ERC, EM/IR, density, and reliability checks using EDA tools like Calibre Closely work with circuit designers to ensure design goals and schedules are met. Support layout reviews and contribute to methodology and automation. #LI-RT1

Qualifications

5-8 years of experience in analog and mixed-signal layout design. Strong hands-on experience with Cadence Virtuoso Layout Suite. Good understanding of analog layout verification and signoff flows.

Strong knowledge of: Device matching and common-centroid layout techniques Symmetry and critical analog routing Shielding and noise isolation methodologies Parasitic-aware layout practices Effective communication skills. Exposure to layout automation, scripting, or productivity enhancement initiatives is desirable. #LI-RT1