Director, Silicon Physical Design CAD

Job description

Build and lead a world-class Physical Design Methodology & CAD team in India, fostering innovation, technical excellence, and a growth mindset. Drive scalable RTL-to-GDSII flows, automation frameworks, and design closure solutions that enable predictable execution and first-pass silicon success. Lead the AI-driven transformation of physical design methodologies, CAD flows, and engineering infrastructure by integrating advanced AI, machine learning, and automation technologies to significantly improve productivity, quality, and engineering velocity.

Partner with engineering leaders across architecture, design, verification, infrastructure, and program management to deliver complex SoCs on schedule while ensuring scalable and efficient development practices. Champion measurable improvements in quality, productivity, compute efficiency, cost optimization, and engineering effectiveness across the silicon development lifecycle. Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. 12+ years of experience in Physical Design, CAD, EDA, or Silicon Engineering, with deep expertise in semiconductor design methodologies and workflows. 5+ years of experience leading and developing engineering teams, including mentoring technical leads and senior engineers while fostering a high-performance engineering culture.

Proven experience defining, building, and scaling CAD methodologies, automation frameworks, and engineering workflows supporting complex SoC and ASIC development programs. Proven success influencing and aligning stakeholders across globally distributed engineering teams to drive cross-functional initiatives and deliver complex silicon programs. Demonstrated impact driving engineering excellence through investments in methodology, automation, infrastructure, and tooling that improve productivity, quality, predictability, and time-to-market.

Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 18+ years of relevant experience Deep expertise in RTL-to-GDSII implementation and sign-off methodologies Experience leading Physical Design methodology or CAD teams supporting multiple silicon programs. Experience driving AI-enabled, data-driven, or automation-focused transformation initiatives within silicon engineering workflows.

Hands-on experience building and scaling compute infrastructure, cloud-native engineering platforms, or large-scale EDA environments. Strong knowledge of industry-standard EDA tools and methodologies from vendors such as Synopsys, Cadence, and Siemens. Experience partnering with EDA vendors to influence product roadmaps, drive tool adoption, and resolve complex technical challenges. Strong programming and automation skills using Python, Tcl, Perl, Shell, or similar languages.

Experience developing silicon for datacenter, AI/ML, networking, or high-performance computing applications. Demonstrated ability to attract, develop, and retain top engineering talent while fostering an inclusive, high-performance culture. This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. *