MACOM Technology Solutions Holdings · Switzerland
Principal Cadence Layout Engineer
Listed on MACOM Technology Solutions Holdings’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there.
Apply on MACOM Technology Solutions Holdings’s careers site →Job description
- In this role layout engineer will closely work with the design team to layout and verify custom analog/mixed-signal IPs
- Lead full-custom IC layout design and verification, including chip floor planning, analog IP layout and chip level layout integration of various analog, mixed-signal and ASIC blocks
- Full verification of Block level and top-level layout including extraction, DRC, LVS, and DFM checking
- Layout schedule planning and working with other IP layout engineers to integrate various layout blocks
- Co-work with designers on block level and top-level floor planning
- Layout review for power/gnd routing, electro migration, signal path check, matching, and signal coupling
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