E-core CPU Power Delivery Engineer

Job description

Job Details

Job Description: The E-core CPU Team is looking for a highly motivated and technically savvy experienced engineer to join our team as Power Delivery Engineer. We are looking for a candidate interested in a cross functional role between circuit design and physical integration for enabling the complete power delivery solution and reliability convergence for the next generation CPU cores. This will be a fast-paced dynamic environment where you will have the opportunity to work on a wide spectrum of circuit and physical design activities.

Primary roles and responsibilities include but are not limited to:

• Perform feasibility study, design/verification/simulation of power distribution network (PDN) and sign off of IR/EM metrics
• Work with power management architects and layout team to define and implement power gating solutions
• Work with RTL, SD and Circuit teams to converge the design on all PDN metrics
• Define bump patterns and on-die power grid
• Work with package integration team to ensure complete IP system meets the design specification
• Work with post-Silicon debug team to triage, debug and fix potential power distribution network issues Behavioral traits required for this position include: Logical thinking, analytical and problem-solving skills Very good verbal/written communication
• Excellent interpersonal skills Skilled at prioritizing work and multi-tasking Qualifications: You must possess the below minimum qualifications to be initially considered for this position.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum qualifications

Must have either BS or MS in Electrical Engineering or Computer Engineering. Minimum 5+ years of experience in a related field.

Related fields include: Physical Design, SoC Design or CPU Design Complementary MOS (CMOS) circuit design Digital logic and optimization Circuit design trade-off for power, performance and area Very Large Scale Integration (VLSI)

Preferred Qualifications

Experience in: Power Delivery design, implementation and validation of high-performance and low-power designs Low power implementation techniques Mentor Graphics RedHawk or equivalent commercial tool for EM and IR drop analysis TCL/Python coding Job Type: Experienced Hire Shift: Shift 1 (Malaysia)

Primary Location

Malaysia, Penang Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

• Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION

• Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices.

We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.