Senior Principal Engineer - Digital Design

Job description

Define and drive SoC, subsystem, and IP architectures aligned with product and technology roadmaps. Lead microarchitecture development for complex digital systems with a strong focus on scalability, power efficiency, performance, and manufacturability. Own critical design decisions and guide architectural trade-offs across performance, power, area (PPA), reliability, and cost objectives. Translate product requirements into robust architectural specifications and implementation plans.

Lead and mentor senior engineers and technical teams, fostering a culture of technical excellence and innovation. Establish engineering methodologies, design standards, quality frameworks, and development processes. Drive risk identification, mitigation planning, and technical decision-making across key projects. Contribute to technology strategy, patent generation, and development of next-generation semiconductor solutions.

Bachelor's, Master's, or Ph.D. in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field. 15+ years of industry experience in digital IC design and semiconductor product development. Extensive experience in architecture, microarchitecture, RTL design, and SoC/IP development. Proven success delivering complex semiconductor products from architecture definition through silicon validation and production.

Expert-level proficiency in Verilog/System Verilog and modern ASIC/SoC development flows Experience leading technical reviews, design sign-offs, risk assessments, and root-cause investigations. We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.

Our hiring decisions are based on skills and experience. Even if you don't meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon. Ensure successful execution across synthesis, timing closure, linting, CDC/RDC analysis, power intent validation, DFT integration, and low-power implementation.

Work closely with architecture, verification, physical design, firmware, software, validation, and product engineering teams throughout the development lifecycle. Drive technical alignment across global teams and serve as the primary technical authority for major design initiatives. Support silicon bring-up, system integration, root-cause analysis, and post-silicon debugging activities. Performance, Power, and Area (PPA) optimisation