Gate-level SigEM/SEB/FIT CAD Engineer

Job description

Imagine what you could do here! At Apple, new ideas have a way of becoming phenomenal products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple. The people who work here have reinvented entire industries with Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices - we continue to strengthen our commitment to leave the world better than we found it!

As an emerging member of our best-in-class CAD Group, you will be part of building innovative designs. You will leverage your strong engineering fundamentals in electrical engineering and computer science—paired with an eagerness to learn electromigration (EM), Statistical Electromigration Budgeting (SEB), Failure In Time (FIT), Self-Heating Effect (SHE), and thermal analysis—to assist in developing, maintaining, and refining methodologies and flows for gate-level as well as transistor-level designs.

You will support tasks spanning IP / SOC signal EM analysis for clock and data nets, SOC FIT budget verification, power-grid EM checks, and flow automation. Are you ready to join some of the world's leading engineers, and help us deliver the next generation of ground-breaking Apple products?