ASIC Design Engineer - Cache Controller
Listed on Apple’s official careers site. Posted July 29, 2026. Check that it is still open and apply there.
Apply on Apple’s careers site →Job description
Apple is building the world’s fastest highly parallel mobile processing systems. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth. In this role, you will work on crafting special purpose cache and controller which is part and parcel of the SOC memory hierarchy.
More jobs at Apple
ASIC Design Engineer
Santa Clara, United States of America
Similar jobs at other companies
Next-Gen System Cache ASIC Digital Design Engineer
Qualcomm · San Diego, California, United States of America
Next Gen, High-Speed, Memory and Cache Controller Design Engineer
Qualcomm · San Diego, California, United States of America
ASIC & FPGA Design Engineer - E2
Lockheed Martin · Liverpool, NY
ASIC & FPGA Design Engineer Sr
Lockheed Martin · Boulder, CO
CPU Microarchitecture & Cache RTL Design Engineer
Advanced Micro Devices (AMD) · Fort Collins, Colorado