SoC UPF Methodology Engineer
Listed on Apple’s official careers site. Posted April 10, 2026. Check that it is still open and apply there.
Apply on Apple’s careers site →Job description
Are you passionate about crafting solutions to intricate challenges? Join the Low Power group at Silicon Technologies and contribute to the development of cutting-edge technology and capabilities for low-power chip design. Your work will fuel Apple’s next-generation chips! You’ll play a crucial role in exploring AI/ML to design the workflow for the next generation of UPF. Additionally, you’ll refine our existing UPF framework and ensure its seamless integration and rigorous verification across our mobile products.
You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Power UPF Engineers, who will drive transistor level power ERC sign-off and power intent-UPF implementation & verification on mobile SOCs.
More jobs at Apple
3rd Party IP Engineering Program Manager
Beaverton, United States of America
Analog Layout Automation Engineer
Beaverton, United States of America
CAD Engineer - Circuit Simulation Methodology
Beaverton, United States of America
CAD Engineer - Custom EMIR Methodology
Beaverton, United States of America
Similar jobs at other companies
SOC Verification and Methodology Engineer
Qualcomm · San Diego, California, United States of America
SOC Verification and Methodology Engineer -Staff
Qualcomm · San Diego, California, United States of America
Senior Engineer Digital Verification and Methodology
Infineon Technologies · Lexington, KY
Staff Engineer Digital Verification and Methodology
Infineon Technologies · Lexington, KY
SoC HW (Digital, Analog or PnP) Validation Engineer
Microsoft · United States, Oregon, Hillsboro