DFT Design Engineer, Machine Learning Acceleration

Job description

Custom SoCs (System on Chip) are at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team, you'll be responsible for designing and optimizing hardware in our data centers, including AWS Inferentia and Trainium systems—our custom-designed machine learning inference and training servers. Our success depends on world-class server infrastructure as we handle massive scale and rapidly integrate emerging technologies.

We're looking for an ASIC DFT Design Engineer to help us trailblaze new technologies and architectures while ensuring high design quality and making the right trade-offs.

Key job responsibilities

• Define and develop state-of-the-art Design for Test (DFT) architectures for advanced technology nodes
• Work closely with block designers and physical design (PD) team to implement highly efficient DFT solutions
• Perform RTL coding and Verification using Verilog/System Verilog
• Utilize industry standard DFT tools to create high coverage and cost-effective test patterns to target advanced silicon defects
• Participate in Silicon debug efforts alongside ATE and System teams
• Communicate and work with team members across multiple disciplines