[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Western Digital jobs](https://jobs.opennash.com/companies/western-digital/) · [Search jobs](/search/) Western Digital · San Jose, CA # HDD Servo Processing Subsystem Architecture Lead San Jose, CA, United States Full-time Manager or lead Operations Listed on Western Digital’s official careers site. Posted September 30, 2026. Check that it is still open and apply there. [Apply on Western Digital’s careers site →](https://jobs.smartrecruiters.com/WesternDigital/744000152763979-hdd-servo-processing-subsystem-architecture-lead) [OpenNash Jobs](https://jobs.opennash.com/) / [Western Digital](https://jobs.opennash.com/companies/western-digital/) / HDD Servo Processing Subsystem Architecture Lead ## Job description ### Senior Manager, Servo Firmware Engineering Location San Jose, CA or Irvine, CA, About the Role We are seeking an experienced Senior Manager to join our organization in San Jose, CA or Irvine, CA, United States. In this role, you will lead the US HDD servo firmware development team responsible for the strategic vision and execution of the servo subsystem firmware architecture to enable next-generation HDD products with multiple concurrent data streams and multi-actuator control. You will be accountable for defining a coherent, scalable platform strategy that balances technical feasibility with economic viability across program schedules, power envelopes, and cost constraints. Essential Duties and Responsibilities · Collaborate with cross-functional stakeholders — including SoC architecture, recording systems, and manufacturing teams — to define and implement HDD servo firmware encompassing real-time motion control, parameter management, microarchitecture, instruction set architecture, and associated toolchains. Facilitate and participate in team meetings and lead firmware and associated tooling development, maintaining clear and sufficient communication for a geographically distributed international development team to support business and technical objectives. Define hardware, firmware, and associated tools designs together with stakeholders and development teams. Negotiate with stakeholders on priority and ensure strong execution of identified hardware, firmware, and associated tools strategy. Enable definition and maintenance of a future-state servo real-time control firmware architecture that scales from single to multiple concurrent data streams and supports concurrent control of multiple actuators and heads. Coordinate SoC microarchitecture decisions affecting servo compute, including core count, memory hierarchy, interconnect design, and dynamic control accelerators, ensuring that FPGA prototype work and accelerator designs map cleanly into production-ready firmware and tools models. Own servo compute resource management and budgeting, including instruction and data memory allocation, processor cycle limits, and regression thresholds; drive adherence through continuous integration practices to prevent late-stage resource conflicts. Lead the co-design of firmware platform architecture, including core control-loop implementations, multi-cluster and multi-actuator orchestration, and cross-generation stability, ensuring deterministic real-time performance across multiple SoC generations. Drive the evolution of the servo firmware tools ecosystem to support multi-cluster, multi-stream characterization and debugging. Coordinate across geographically distributed teams — including servo firmware, SoC architecture and design, recording subsystem and algorithms, servo tools, manufacturing firmware, and test — to align platform decisions with program risk, schedules, yield, and customer experience objectives. Deliver major multi-stream and multi-actuator capabilities that meet control performance and power targets on new SoC generations. Communicate technical concepts, architectural trade-offs, and strategic recommendations to senior management and cross-functional stakeholders, providing architectural guidance throughout the product development lifecycle. ## Qualifications REQUIRED Bachelor's degree in computer engineering, electrical engineering, computer science, or equivalent degree and professional experience. 10+ years of professional experience in embedded architecture and development, with a specific focus on real-time control, storage technology, or related servo control applications. 5+ years of experience in senior technical leadership roles, demonstrating strong leadership and a consistent commitment to delivering results. Proficiency in digital signal processing and real-time systems development. Demonstrated experience with FPGA and/or ASIC design for embedded applications. Preferred Master's degree or relevant professional certification (e.g., embedded systems, real-time architecture). PhD or specialist certification with demonstrated expertise in real-time, multi-core computing platform architecture. Proficiency in servo control theory, including loop design, stability analysis, and performance optimization Skills Proficiency in C/C++ programming, including compiler toolchain awareness. Familiarity with MATLAB, Simulink, and other modeling and simulation tools such as Renode. Solid understanding of hardware-software co-design and system-level integration. Proven ability to lead cross-functional engineering teams across geographically distributed locations and manage complex technical projects. Excellent analytical and problem-solving skills with meticulous attention to detail. Excellent communication, interpersonal, and collaborative skills, including strong presentation abilities, with demonstrated capability to work effectively across worldwide engineering teams in English. Experience with product development lifecycle and design-for-manufacturability principles. Familiarity with industry standards and best practices in storage technology. Ability to work effectively in a fast-paced, collaborative environment. ## At a glance - Posted by the employer: Sep 30, 2026 - First seen by OpenNash: Jul 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 99 days - Location: San Jose, CA, United States - Employment type: Full-time[Apply on Western Digital’s careers site →](https://jobs.smartrecruiters.com/WesternDigital/744000152763979-hdd-servo-processing-subsystem-architecture-lead) ## More jobs at Western Digital ### [Associate, Corporate Development Analyst](https://jobs.opennash.com/companies/western-digital/jobs/4889658d1c7d80120d4c/) San Jose, CA, United States ### [Associate, Corporate Strategy Analyst](https://jobs.opennash.com/companies/western-digital/jobs/79d839611fcd2fe56fe6/) San Jose, CA, United States ### [Customer Failure Analysis Engineer](https://jobs.opennash.com/companies/western-digital/jobs/4717456340039146ac31/) San Jose, CA, United States ### [Hardware Engineer](https://jobs.opennash.com/companies/western-digital/jobs/4d98f6d5b38278b3c356/) San Jose, CA, United States ### [Integration Engineer](https://jobs.opennash.com/companies/western-digital/jobs/5eef96ba24c3df8d5e81/) San Jose, CA, United States ## Similar jobs at other companies ### [Always On Subsystem Power Management Firmware Engineer to Always On Subsystem Power Management Firmware Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/2fcf5bd8b28c581f4c62/) Qualcomm · San Diego, California, United States of America ### [Subsystem Design & Install Manager - Level 5](https://jobs.opennash.com/companies/lockheed-martin/jobs/2f923e32fd7c5af89e05/) Lockheed Martin · Palmdale, CA ### [Subsystem Design Engineer - Early Career](https://jobs.opennash.com/companies/lockheed-martin/jobs/00b95255f3ffa1da0da6/) Lockheed Martin · Fort Worth, TX ### [Design Verification Engineer — Memory Subsystem](https://jobs.opennash.com/companies/qualcomm/jobs/b8ebd0b1780b1fe42172/) Qualcomm · Santa Clara, California, United States of America ### [Processing Area Operator](https://jobs.opennash.com/companies/cargill/jobs/6a46356d1b946a3b45d3/) Cargill · Milwaukee, Wisconsin OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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