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Texas Instruments · Bengaluru, Karnataka, India

# PMIC Analog Design Engineer

Bengaluru, Karnataka, India Design 

Listed on Texas Instruments’s official careers site. Posted September 23, 2026. Check that it is still open and apply there.
[Apply on Texas Instruments’s careers site →](https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/job/25018071)

[OpenNash Jobs](https://jobs.opennash.com/) / [Texas Instruments](https://jobs.opennash.com/companies/texas-instruments/) / PMIC Analog Design Engineer

## Job description

Change the world. Love your job. We are looking for a highly skilled and passionate Analog Designer, with PMIC experience preferred, to partner with senior technical leads to execute PMIC programs, otaking primary ownership of assigned blocks/sub-systems while receiving architectural guidance on system-level decisions. This is a deeply technical, hands-on role — you will be doing circuit design, participating in layout reviews, PEX simulations, analysis leading to architecture decisions, and collaborating with cross-functional experts to deliver successful IPs and Products.

### Following are the key responsibilities
- Design and deliver high-performance analog circuits and blocks needed for power converter circuits — buck, boost, LDO, and charge pump — meeting aggressive targets for power performance, efficiency, and transients.
- Contribute towards PMIC system architecture development and execute block-level designs against challenging performance, power, and area specifications.
- Own technical execution across the full IC design flow: schematic capture, simulation, layout review, post-layout verification, silicon bring-up, and characterization
- Serve as primary technical owner for one or more complex blocks, sub-system and converters (with some guidance & support) within multi-block PMIC products
- Ensure design quality, robustness, and reliability through in-depth technical reviews
- Collaborate with internal systems and architecture teams to resolve integration challenges and drive technical closure
- Mentor and support junior engineers on design methodology, tools, and best practices

## Qualifications

### Minimum requirements
- Bachelor's degree in Electrical Engineering or related field (Master's or PhD preferred)
- 4+ years of analog/mixed-signal IC design experience with strong analog fundamentals and design understanding for standard blocks including BGRs, V2Is, Amplifiers, Comparators, Level shifters, Oscillators
- Experience with high-voltage circuit designs and high speed level shifters
- Familiarity with SOA (Safe Operating Area) & Reliability, Aging sims
- Strong understanding of mismatch effects and device noise, with experience in auto-zeroing, chopping, and statistical analysis
- Good understanding of Control Systems fundamentals, compensation, large signal analysis etc.
- Fully proficient and deeply comfortable with standard Power IC design flows end-to-end (Cadence Virtuoso, Spectre)
- Worst-case corner analysis, top-level and Monte Carlo simulation, and post-layout PEX sign-off
- Strong knowledge of BCD and/or advanced CMOS process trade-offs for high-performance Power IC design
- Ability to work independently and drive design related technical decisions with confidence and provide predictable development schedule for blocks & sub-systems based on the specifications, with high quality.
- Should be able to independently explore multiple options and come up with optimum architectures of blocks for given specs and execute with high quality while adhering to the schedules.

### Strong written and verbal communication skills Preferred qualifications
- Experience in designing blocks for PMICs in consumer electronics (mobile, laptops, wearables)

### Understanding of one or more converter control architectures
- Adaptive/Constant On/Off Time, peak/valley/average current mode control
- Hands-on transistor-level design of integrated power FETs, gate drivers, oscillators, bandgap/bias circuits, error amplifiers, and frequency compensation networks
- High-efficiency design techniques with focus on performance while minimizing power and area.

### Working familiarity with multi-rail PMIC SoC integration
- power sequencing, UVLO, OCP, OTP, and digital interfaces (I2C, SPI, MIPI I3C)
- Experience in customer-facing technical alignment and specification negotiation
- Physical layout understanding and key aspects including power routing, grounding, signal integrity, thermal management, and die area optimization
- Exposure to Simplis, AMS, or equivalent simulation tools (good to have)
- Experience of full / partial design ownership of Switching Converters, LDOs

### Full-cycle IC design experience
- schematic, simulation, layout collaboration, post-layout verification, silicon validation, and characterization
- Ability to independently manage and execute multiple design tasks in parallel on aggressive schedules
- Mentoring Junior members and New College Graduates in the team

## At a glance
- Posted by the employer: Sep 23, 2026
- First seen by OpenNash: Oct 11, 2026
- Last checked: Oct 18, 2026
- Listed for: 25 days
- Location: Bengaluru, Karnataka, India[Apply on Texas Instruments’s careers site →](https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/job/25018071)

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