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Texas Instruments · Bengaluru, Karnataka, India

# Layout Engineer

Bengaluru, Karnataka, India Operations 

Listed on Texas Instruments’s official careers site. Posted August 24, 2026. Check that it is still open and apply there.
[Apply on Texas Instruments’s careers site →](https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/job/25011289)

[OpenNash Jobs](https://jobs.opennash.com/) / [Texas Instruments](https://jobs.opennash.com/companies/texas-instruments/) / Layout Engineer

## Job description

### Roles and responsibilities

Frame the layout schedule, effort estimation, risk and mitigation plan of layout activities for all layout engineers in the project
- Work closely with designers to understand the architecture and key requirements for the IC Strike right balance of area, performance and schedule during layout development by collaborating with design, packaging and process teams
- Work closely with Process development team to carry out PDK, P-cell and Design rule updates
- Work closely with Packaging engineer to develop custom lead-frames for various packages Analysis and closure of Electro Migration, Thermal gradients, ESD/LU performance and layout parasitic Routinely develop test vehicles for new process & package technology development
- Mentor and guide junior layout engineers/contract engineers, review their work and provide feedback to meet the quality and schedule norms Responsible for the final layout which meets the design expectations and layout checklist.

Identify improvements needed in process/ quality/ cycle time and take up necessary initiatives

## Qualifications

### Knowledge and skills

Full chip layout experience from definition through release of IC to production Strong LVS, DRC, ERC, and antenna debug skills
- Proficient in analog and mixed-signal layout techniques and verification process including Device Matching, Power Bus design, avoiding Cross-talk, ESD/LU protection techniques Good understanding about all layout parasitics (R, C, diodes, BJTs) Good understanding of device physics and semiconductor fabrication process
- Must have worked on some of the Technologies like: 40nm, 65nm, 90nm, 130nm, 180nm, BiCMOS, BCD Should be well versed with tools such as Virtuoso XL/Assura /PVS/Voltas
- Ability to quickly ramp up on new tools/ process and mentor LEs Experience in automation/ SKILL coding for reducing cycle time/ quality checks will be an added advantage Requires excellent teamwork, good communication, strong problem-solving and documentation skills.

Strong time management skills for on-time project delivery Ability to take initiatives and drive for results

## At a glance
- Posted by the employer: Aug 24, 2026
- First seen by OpenNash: Oct 11, 2026
- Last checked: Oct 18, 2026
- Listed for: 55 days
- Location: Bengaluru, Karnataka, India[Apply on Texas Instruments’s careers site →](https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/job/25011289)

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