[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Synopsys jobs](https://jobs.opennash.com/companies/synopsys/) · [Search jobs](/search/) Synopsys · Hsinchu, Taiwan # ASIC Design Verification, Architect Hsinchu, Taiwan Design Listed on Synopsys’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Synopsys’s careers site →](https://careers.synopsys.com/job/hsinchu/asic-design-verification-architect/44408/98452476064) [OpenNash Jobs](https://jobs.opennash.com/) / [Synopsys](https://jobs.opennash.com/companies/synopsys/) / ASIC Design Verification, Architect ## Job description ### We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. ### You Are An experienced and visionary ASIC Digital Verification Architect, who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in verification methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of HBM or PCIe/CXL and its applications. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. ### What You’ll Be Doing Defining and developing ASIC RTL design and verification at both chip and block levels. Creating and executing verification plans for complex digital designs, particularly focusing on HBM or PCIe/CXL. Collaborating with cross-functional teams to ensure seamless integration and functionality of designs. Utilizing advanced verification methodologies and tools to achieve high-quality verification results. Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement. Communicating with internal and external stakeholders to align on project goals and deliverables. ### The Impact You Will Have Enhancing the reliability and performance of Synopsys’ digital verification processes. Driving innovations in HBM or PCIe/CXL technology, contributing to the development of cutting-edge semiconductor solutions. Improving time-to-market for high-performance silicon chips through efficient verification methodologies. Building and nurturing a highly skilled verification team, elevating overall project quality. Influencing strategic decisions that shape the future of Synopsys’ verification capabilities. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements. ### What You’ll Need Extensive experience in ASIC RTL design and verification. In-depth knowledge of HBM or PCIe protocols and their applications. Proficiency in advanced verification tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. ### Who You Are A team member who encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 7 days - Location: Hsinchu, Taiwan[Apply on Synopsys’s careers site →](https://careers.synopsys.com/job/hsinchu/asic-design-verification-architect/44408/98452476064) ## More jobs at Synopsys ### [ASIC Design / Verification, Manager-Sr Manager](https://jobs.opennash.com/companies/synopsys/jobs/de52c027f8e62aaeb0a3/) Hsinchu, Taiwan ### [ASIC Design Verification Engineer, Staff - Principal](https://jobs.opennash.com/companies/synopsys/jobs/ba35fce3a3bcb461af94/) Hsinchu, Taiwan ### [Design Verification Staff Engineer - 19165](https://jobs.opennash.com/companies/synopsys/jobs/bdbfcb93640626f6fbcd/) Hsinchu, Taiwan ### [NVM Circuit Design Engineer, Staff](https://jobs.opennash.com/companies/synopsys/jobs/2d37cb91477aa550e10d/) Hsinchu, Taiwan ### [SRAM Design Engineer, Staff](https://jobs.opennash.com/companies/synopsys/jobs/9b2ccccaf4b24b75d165/) Hsinchu, Taiwan ## Similar jobs at other companies ### [ASIC/FPGA Design Verification Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/b9ebab233b8dca4884ac/) Qualcomm · Ottawa, Ontario, Canada ### [ASIC/FPGA Design Verification Engineer, Senior](https://jobs.opennash.com/companies/qualcomm/jobs/f7cc8fb7b0460376d7d6/) Qualcomm · Ottawa, Ontario, Canada ### [ASIC Verification & Validation Engineer](https://jobs.opennash.com/companies/sandisk/jobs/b95085e1cf95126531eb/) Sandisk ### [Experienced ASIC Verification Engineer](https://jobs.opennash.com/companies/sandisk/jobs/2e3bfeb099c126455dc1/) Sandisk ### [ASIC Engineer Intern, Design Verification](https://jobs.opennash.com/companies/meta-platforms/jobs/43d8aede4f46318eebe6/) Meta Platforms · Bangalore, IN [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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