[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Synopsys jobs](https://jobs.opennash.com/companies/synopsys/) · [Search jobs](/search/) Synopsys · Wuhan, China # DDR/LPDDR IP Design Staff Engineer Wuhan, China Senior individual contributor Design Listed on Synopsys’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Synopsys’s careers site →](https://careers.synopsys.com/job/wuhan/ddr-lpddr-ip-design-staff-engineer/44408/101071131456) [OpenNash Jobs](https://jobs.opennash.com/) / [Synopsys](https://jobs.opennash.com/companies/synopsys/) / DDR/LPDDR IP Design Staff Engineer ## Job description Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Seeking a highly motivated and innovative senior engineer with wide-spectrum knowledge of generic ASIC design methodology, and simulation/silicon debug skills. The candidate would be working as part of a highly experienced DDR/LPDDR design and verification team, targeting the current and next generation technology. Theoretical and practical background in DDR or LPDDR is a solid plus. The position offers an excellent opportunity to work with a professional team of digital and mixed-signal engineers responsible for delivering high-end designs and supporting DDR/LPDDR products. ### Key Qualifications BSEE in EE with 6+ years of digital design experience or MSEE with 3+ years of relevant experience - Work on digital design based on predefined RTL coding style include Verilog and System Verilog, clean RTL check violations in lint, CDC, DFT and synthesis Solid Debugging skills and ability to root cause issues include both simulation and silicon Good knowledge of SNPS EDA tools like VCS, Verdi, Spyglass, DC, Formality Good communication skills for interacting between different design groups and customer support teams are required Preferred Experience Has strong desire to learn and explore new technologies - Demonstrates good analysis and problem-solving skills - Knowledge in interface technologies such as DDR, HBM, UCIe is a plus Scripting experience in Shell, Perl, Python and TCL is a plus - Knowledge of analogic circuit is a plus Interacting with Application Engineers for customer support ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 7 days - Location: Wuhan, China[Apply on Synopsys’s careers site →](https://careers.synopsys.com/job/wuhan/ddr-lpddr-ip-design-staff-engineer/44408/101071131456) ## More jobs at Synopsys ### [DDR/LPDDR IP Design Principal Engineer](https://jobs.opennash.com/companies/synopsys/jobs/f3079e66756950dfef55/) Wuhan, China ### [DDR/LPDDR IP Design Sr Staff Engineer](https://jobs.opennash.com/companies/synopsys/jobs/71bb6f8fd0f132b9b15c/) Wuhan, China ### [Serdes IP Design Engineer](https://jobs.opennash.com/companies/synopsys/jobs/a552d9d005d47089e2ac/) Wuhan, China ### [ASIC DFT Engineer](https://jobs.opennash.com/companies/synopsys/jobs/a699cc26632524bfabe0/) Wuhan, China ### [LPDDR PHY IP Verification Engineer](https://jobs.opennash.com/companies/synopsys/jobs/7c15dce21dbfb760f82c/) Wuhan, China ## Similar jobs at other companies ### [DDR Design Verification Staff Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/b5498bd533b8361de175/) Qualcomm · Bangalore, India ### [DDR STA/Timing Engineer (Staff/ Senior Staff)](https://jobs.opennash.com/companies/qualcomm/jobs/d2d3adc5a6bb664535cf/) Qualcomm · Bangalore, India ### [Senior Manager, VLSI Design Engineering ( IO Design (LVCMOS, HVCMOS, DDR, LVDS)) with 15+ Years of experience](https://jobs.opennash.com/companies/sandisk/jobs/58f8e2e8cc7cbccf499d/) Sandisk ### [Staff Physical Design Engineer-DPG-LPDDR](https://jobs.opennash.com/companies/micron-technology/jobs/a3c1692656ef13396ca1/) Micron Technology · Hyderabad - Phoenix Aquila, India ### [Staff / Senior Staff Engineer Digital Design (RTL Design)](https://jobs.opennash.com/companies/infineon-technologies/jobs/bcdb3b7a61b92eede1d2/) Infineon Technologies · Singapore [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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