[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Renesas Electronics jobs](https://jobs.opennash.com/companies/renesas-electronics/) · [Search jobs](/search/) Renesas Electronics · Bengaluru, KA, India # Sr. Staff Engineer - Physical Design Bengaluru, KA, India Full-time Senior individual contributor Design Listed on Renesas Electronics’s official careers site. Posted October 6, 2026. Check that it is still open and apply there. [Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000153699479-sr-staff-engineer-physical-design) [OpenNash Jobs](https://jobs.opennash.com/) / [Renesas Electronics](https://jobs.opennash.com/companies/renesas-electronics/) / Sr. Staff Engineer - Physical Design ## Job description We are seeking an experienced and highly technical Backend Physical Design Engineer to drive the physical implementation of our next-generation, high-performance SoCs. You will own the complete RTL-to-GDSII flow, focusing heavily on power recovery, clock tree optimization, and pushing aggressive PPA metrics on advanced technology nodes ### Key Responsibilities RTL-to-GDSII Execution: Own and drive the end-to-end physical design implementation, including floor planning, synthesis, placement, Clock Tree Synthesis (CTS), and routing. ### PPA Optimization Fine-tune the design to meet stringent Power, Performance, and Area (PPA) targets. Employ advanced techniques like multi-voltage domains, power gating (UPF), and datapath optimization to minimize power while maximizing speed. ### Timing Closure & STA Drive Static Timing Analysis (STA) across multiple corners and operating modes. Resolve setup/hold violations, signal integrity issues, and clock domain crossing constraints. ### Physical & Formal Verification Execute Design Rule Checks (DRC), Layout Versus Schematic (LVS), electromigration/IR drop (EMIR) analysis, and Equivalence Checking (LEC/Formality) to ensure design reliability and manufacturability. ### Cross-Functional Collaboration Work closely with RTL (Frontend), DFT, and Signoff teams to iterate on designs and structural changes for optimal PPA. ### Programming/Scripting Strong scripting skills in Tcl, Python, or Perl to automate flows and improve design methodologies ## Qualifications Experience of about 10+ years in Physical design implementation Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Ability to understand design specifications, can contribute to design planning, partitioning, and setup a feasible seed for convergence PD cycle. Extensive experience in physical design PPA activities, including floorplanning, placement, clock tree synthesis, routing, and timing closure. Good understanding of EDA tools such as Fusion Compiler, Innovus, Primetime, Tempus, VCLP, LEC, Calibre, Red Hawk. Strong understanding of static timing analysis, power analysis, and signal integrity analysis. Excellent problem-solving skills and attention to detail. Ability to work effectively in a team environment and communicate clearly with cross-functional teams. Experience in mentoring and coaching junior engineers is a plus. ## At a glance - Posted by the employer: Oct 6, 2026 - First seen by OpenNash: Oct 12, 2026 - Last checked: Oct 19, 2026 - Listed for: 13 days - Location: Bengaluru, KA, India - Employment type: Full-time[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000153699479-sr-staff-engineer-physical-design) ## More jobs at Renesas Electronics ### [Director Engineering, Analog Design (Power ICs) - Chip Lead](https://jobs.opennash.com/companies/renesas-electronics/jobs/6fba84ec366427ba9039/) Bengaluru, KA, India ### [Engineer, Design Verification](https://jobs.opennash.com/companies/renesas-electronics/jobs/b139c1f70b82218e7f7f/) Bengaluru, KA, India ### [Principal Digital Engineer (DFT Design)](https://jobs.opennash.com/companies/renesas-electronics/jobs/59c67013daae5b874af2/) Bengaluru, KA, India ### [Senior Engineer, Analog Circuit Design](https://jobs.opennash.com/companies/renesas-electronics/jobs/dfbd46a1086684155d7a/) Bengaluru, KA, India ### [Senior Engineer, Design Verification (MCU)](https://jobs.opennash.com/companies/renesas-electronics/jobs/91baefee5103b4d3d97d/) Bengaluru, KA, India ## Similar jobs at other companies ### [NPU Physical Design Engineer (Lead/Staff/Sr Staff)](https://jobs.opennash.com/companies/qualcomm/jobs/6c197dcc0ecf984e3558/) Qualcomm · Bangalore, India ### [SoC Physical Design CAD Engineer (Staff/Sr Staff)](https://jobs.opennash.com/companies/qualcomm/jobs/de557e36c083dee95dbc/) Qualcomm · Bangalore, India ### [Senior Staff Engineer Physical Design and Methodology (f/m/div)](https://jobs.opennash.com/companies/infineon-technologies/jobs/46bbe226ff31021fb81f/) Infineon Technologies · Munich ### [Staff / Senior Staff Engineer Digital Design (RTL Design)](https://jobs.opennash.com/companies/infineon-technologies/jobs/bcdb3b7a61b92eede1d2/) Infineon Technologies · Singapore ### [Physical Design Engineer II](https://jobs.opennash.com/companies/microsoft/jobs/2d7f9c2e826bc117df12/) Microsoft · India, Karnataka, Bangalore OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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