[Skip to main content](#main-content)

[OpenNash Jobs](https://jobs.opennash.com/)
[Hiring report](/reports/hiring/) · [All Renesas Electronics jobs](https://jobs.opennash.com/companies/renesas-electronics/) · [Search jobs](/search/)

Renesas Electronics · Sophia Antipolis, France

# Staff Layout Design Engineer

Sophia Antipolis, France Full-time Senior individual contributor Design 

Listed on Renesas Electronics’s official careers site. Posted October 5, 2026. Check that it is still open and apply there.
[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000153431609-staff-layout-design-engineer)

[OpenNash Jobs](https://jobs.opennash.com/) / [Renesas Electronics](https://jobs.opennash.com/companies/renesas-electronics/) / Staff Layout Design Engineer

## Job description

Looking for an experienced and talented Layout Design Engineer where in the candidate will get to work on a wide range of exciting products such as DC-DC converters, Controllers and Drivers.

### Essential Functions

Experienced in all aspects of Analog layout design from block level to full chip with a demonstrated history in driving design innovation and best practices. Should have the ability to work independently with little supervision to floorplan and layout typical analog circuits such as charge pumps, comparators, amplifiers, bandgaps, linear regulators etc take complete ownership to drive all aspects within the committed schedule.

Must have deep knowledge in floor planning, leaf cell layout and analog layout matching techniques along with designing for EM and reliability. Must be a natural team player, will collaborate with cross layout teams over the world to deliver high quality layouts.

## Qualifications

### Minimum Requirements

Bachelor’s or Master’s degree in Electrical and Computer engineering 6+ years in Analog Layout Design and associated flows for DRC, LVS, Packaging

### Additional Preferred Qualifications

Solid understanding of IC processing (preferably BCD nodes), packaging and production test along with familiarity with advanced IC CAD tools SKILL coding and proficiency in any of the scripting languages such as Python, Perl, TCL etc Expertise in the required CAD tools (Virtuoso XL / Calibre DRC, LVS & PEX / PVS / R3D) Work closely in collaboration with colleagues in design and layout to minimize need for rework. Follow methodology guidelines to ensure easy portability of IP across designs.

## At a glance
- Posted by the employer: Oct 5, 2026
- First seen by OpenNash: Oct 12, 2026
- Last checked: Oct 19, 2026
- Listed for: 14 days
- Location: Sophia Antipolis, France
- Employment type: Full-time[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000153431609-staff-layout-design-engineer)

## More jobs at Renesas Electronics

### [(Sr.) Staff Package Design Engineer - MIS substrate/FC expose die (Experienced in Power or Gan is requried)](https://jobs.opennash.com/companies/renesas-electronics/jobs/030ff65556291fb78d30/)

Shanghai, China

### [(Sr.) Staff Package Design Engineer - MIS substrate/FC expose die （ Experienced in Power or Gan is requried)](https://jobs.opennash.com/companies/renesas-electronics/jobs/359dfbdcc9b966bab85a/)

Kaohsiung, Kaohsiung City, Taiwan

### [ARM CPU Subsystem Design Leader](https://jobs.opennash.com/companies/renesas-electronics/jobs/860b92d0e84cb63dc206/)

Kodaira, Japan

### [Altium Designer Trainer and Content Creator](https://jobs.opennash.com/companies/renesas-electronics/jobs/698cf22abca261109452/)

San Diego, CA, United States

### [Altium Designer Trainer and Content Creator](https://jobs.opennash.com/companies/renesas-electronics/jobs/bad198a50a48b98d193b/)

Tokyo, Japan

## Similar jobs at other companies

### [Staff Engineer Layout Design](https://jobs.opennash.com/companies/infineon-technologies/jobs/fdeab4792013c84fda64/)

Infineon Technologies · Shanghai, 上海

### [Staff Engineer Layout and Mask Design](https://jobs.opennash.com/companies/infineon-technologies/jobs/ba99a561787308012852/)

Infineon Technologies · Bangalore BTP

### [Packaging Engineer (Substrate Design and Layout)](https://jobs.opennash.com/companies/sandisk/jobs/0879670410f04691dc62/)

Sandisk 

### [Packaging Engineer (Substrate Design and Layout, Only open for fresh graduate)](https://jobs.opennash.com/companies/sandisk/jobs/735351022b0a02b8dbda/)

Sandisk 

### [Mask Layout Designer, Staff - Cork, Ireland](https://jobs.opennash.com/companies/qualcomm/jobs/5e7a5b98bb6697ac577d/)

Qualcomm · Cork, Ireland

OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)