[Skip to main content](#main-content)

[OpenNash Jobs](https://jobs.opennash.com/)
[Hiring report](/reports/hiring/) · [All Renesas Electronics jobs](https://jobs.opennash.com/companies/renesas-electronics/) · [Search jobs](/search/)

Renesas Electronics · Kodaira, Japan

# Memory Layout Technical Lead

Kodaira, Japan Full-time Manager or lead Operations 

Listed on Renesas Electronics’s official careers site. Posted October 16, 2026. Check that it is still open and apply there.
[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000155919820-memory-layout-technical-lead)

[OpenNash Jobs](https://jobs.opennash.com/) / [Renesas Electronics](https://jobs.opennash.com/companies/renesas-electronics/) / Memory Layout Technical Lead

## Job description
- Technical Domain Layout design for non-volatile memory (NVM) IP, including Flash, MRAM, and ReRAM
- Target Products MCUs for automotive, industrial, and IoT applications
- Project Overview Layout design for NVM IP based on memory cells developed by in-house fabs and foundry partners
- Contribute to PPA (Performance, Power, and Area) optimization of MCU products
- Collaborate with global NVM development teams in Japan and overseas

### Responsibilities
- Serve as the technical lead for the memory layout design team Develop layout strategies based on IP requirements and circuit specifications Lead hands-on layout design and verification activities Renesas is expanding its investment in next-generation embedded NVM technologies and IP development to further strengthen the competitiveness of its MCUs for automotive, industrial, and IoT applications.

As embedded NVM IP—including Flash and emerging memory technologies such as MRAM and ReRAM—is a key differentiator for MCUs, demand continues to grow for higher performance, greater capacity, and enhanced reliability. This position is responsible for the layout design of embedded NVM IP for future MCUs.

You will have the opportunity to develop a core technology that supports a world-leading MCU business shipping tens to hundreds of millions of units, enabling you to make a significant business impact. Renesas’ embedded NVM IP development organization also actively and continuously submits and presents papers at premier international semiconductor conferences, including ISSCC, the Symposium on VLSI Circuits, and IEDM.

Working alongside highly skilled development engineers, you will be able to further deepen your expertise while gaining experience and broader skills across memory technologies.

## Qualifications

【MUST】
- Experience in full-custom layout design for non-volatile memory (typically 10+ years)
- Experience in building consensus with circuit designers and leading layout design reviews (typically 5+ years)
- Experience collaborating with overseas partners in English 【WANT】
- Experience in P&R design
- Experience in analog circuit design
- Experience in AI-assisted layout design

## At a glance
- Posted by the employer: Oct 16, 2026
- First seen by OpenNash: Oct 19, 2026
- Last checked: Oct 19, 2026
- Listed for: 3 days
- Location: Kodaira, Japan
- Employment type: Full-time[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000155919820-memory-layout-technical-lead)

## More jobs at Renesas Electronics

### [Application Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/97d0b8aceb7c75c13b01/)

Kodaira, Japan

### [Automotive MCU/SoC Test Development & Evaluation Automation Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/9c994a75d4fa47450634/)

Kodaira, Japan

### [CPU Subsystem Engineering Manager](https://jobs.opennash.com/companies/renesas-electronics/jobs/59409127dc16a5b15f7c/)

Kodaira, Japan

### [Edge AI / Embedded AI Development Tool Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/5f0550abdcd4b4ab0049/)

Kodaira, Japan

## Similar jobs at other companies

### [Technical Program Manager – Semiconductor & Memory Test Solutions](https://jobs.opennash.com/companies/sandisk/jobs/5317f1efef6d46392ab3/)

Sandisk 

### [Sr. Memory Layout Engineer (7676)](https://jobs.opennash.com/companies/taiwan-semiconductor/jobs/a904b85d8fd1b370aef7/)

Taiwan Semiconductor · Ottawa, ON, CA

### [Memory Layout Manager](https://jobs.opennash.com/companies/intel/jobs/022a7862a7ed6afb5684/)

Intel · India, Bangalore

### [Technology Lead- Memory Layout](https://jobs.opennash.com/companies/infosys/jobs/ffba6ca856a95e11d99d/)

Infosys · Burnaby, Vancouver

### [Memory Layout Design Engineer](https://jobs.opennash.com/companies/cisco-systems/jobs/1f7a83c0ab657813b0e7/)

Cisco Systems · Armenia

OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)