[Skip to main content](#main-content)

[OpenNash Jobs](https://jobs.opennash.com/)
[Hiring report](/reports/hiring/) · [All Renesas Electronics jobs](https://jobs.opennash.com/companies/renesas-electronics/) · [Search jobs](/search/)

Renesas Electronics · Austin, TX

# Senior Director, Physical Design & Backend Engineering (HPC)

Austin, TEXAS, United States Full-time Director Software Engineering 

Listed on Renesas Electronics’s official careers site. Posted July 21, 2026. Check that it is still open and apply there.
[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000138933284-senior-director-physical-design-backend-engineering-hpc-)

[OpenNash Jobs](https://jobs.opennash.com/) / [Renesas Electronics](https://jobs.opennash.com/companies/renesas-electronics/) / Senior Director, Physical Design & Backend Engineering (HPC)

## Job description

The Senior Director, Physical Design & Backend Engineering is accountable for end-to-end backend execution across HPC SoC and MCU programs, including implementation, signoff, and convergence from RTL to GDS. This role leads globally distributed engineering teams and ensures delivery of high-quality silicon on schedule, meeting defined power, performance, and area (PPA) targets. The role operates at the intersection of execution, technology enablement, and organizational leadership, driving consistency, scalability, and reliability across multiple sites and concurrent programs.

### Key Responsibilities
- End-to-End Backend Execution
- Own full lifecycle delivery from RTL through physical implementation, signoff, and tape-out.
- Ensure predictable execution, design closure, and milestone adherence across all programs.
- Drive first-pass silicon success through robust methodologies and execution discipline.
- Global Team Leadership
- Lead and scale large, geographically distributed backend engineering teams.
- Establish clear accountability, performance standards, and delivery ownership across sites.
- Build organizational capability to support multiple concurrent SoC and MCU programs.
- PPA and Quality Accountability
- Own delivery against defined power, performance, and area (PPA) targets.
- Drive continuous improvement in cost, quality, and engineering efficiency.
- Ensure adherence to quality standards, signoff criteria, and validation requirements.
- Technology and Methodology Enablement
- Enable adoption of advanced process nodes and associated design methodologies.
- Drive improvements in tools, flows, and engineering practices across implementation and signoff.
- Partner with foundries, EDA vendors, and internal teams to enhance design outcomes.
- Cross-Functional Collaboration
- Partner with architecture, RTL, DFT, methodology, and product engineering teams.
- Ensure alignment between architectural intent and physical implementation feasibility.
- Support program execution through close collaboration with program and product leadership.
- Organizational Execution and Scaling
- Standardize ways of working across global teams to reduce variability and improve predictability.
- Drive data-driven execution using metrics, KPIs, and performance tracking.
- Identify and remove bottlenecks impacting delivery timelines or quality

## Qualifications

### Experience
- Approximately 20+ years of experience in semiconductor design, with strong focus on physical design and implementation.
- Proven experience leading large-scale, global engineering teams.
- Demonstrated track record of delivering complex SoC programs across multiple technology nodes.

### Technical Expertise
- End-to-end RTL-to-GDSII flow, including synthesis, place and route, timing closure, and physical verification.
- Advanced node implementation and signoff methodologies.
- Deep understanding of SoC and MCU design and integration.

### Leadership Capabilities
- Ability to lead large, globally distributed teams in a matrixed environment.
- Strong execution focus with accountability for delivery outcomes.
- Effective cross-functional collaboration and stakeholder management.
- Data-driven decision-making and structured problem-solving.

### Preferred Qualifications
- Experience in high-performance computing, automotive, or advanced SoC domains.
- Exposure to methodology and flow development at scale.
- Experience working across multiple geographies and cultures.

### Key Success Measures
- On-time delivery of silicon across programs.
- Achievement of PPA and quality targets.
- Improvement in execution predictability and cycle time.
- Organizational scalability and capability development.

## At a glance
- Posted by the employer: Jul 21, 2026
- First seen by OpenNash: Oct 12, 2026
- Last checked: Oct 12, 2026
- Listed for: 83 days
- Location: Austin, TEXAS, United States
- Employment type: Full-time[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000138933284-senior-director-physical-design-backend-engineering-hpc-)

## More jobs at Renesas Electronics

### [Senior Software Engineer – Benchmarking, Performance & Competitive Analysis](https://jobs.opennash.com/companies/renesas-electronics/jobs/481d0a5d92897721f84c/)

Austin, TEXAS, United States

### [Software Architect](https://jobs.opennash.com/companies/renesas-electronics/jobs/19e5a0bbba0dfb708ddb/)

Austin, TEXAS, United States

### [AI Search & SEO Specialist](https://jobs.opennash.com/companies/renesas-electronics/jobs/29ef541e65bd041720a7/)

Austin, TEXAS, United States

### [Application Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/23a820dc0e636d90d082/)

Austin, TEXAS, United States

### [Application Technology Architect – Drone & UAV Applications](https://jobs.opennash.com/companies/renesas-electronics/jobs/da0dd5ee2d8eb89c7af7/)

Austin, TEXAS, United States

## Similar jobs at other companies

### [Physical Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/dda9e8d7a67c5354a6eb/)

Qualcomm · Tijuana, Baja California, Mexico

### [CPU Physical Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/831567c9a5b68f024d18/)

Qualcomm · Austin, Texas, United States of America

### [Senior Director, Enterprise Physical Security & Safety](https://jobs.opennash.com/companies/aegon/jobs/76af6e09c9991cd15b34/)

Aegon · Philadelphia, Pennsylvania

### [Director, ASIC Physical Design](https://jobs.opennash.com/companies/nokia/jobs/d2e4327dc6d88456a17b/)

Nokia · United States

### [Physical Design CAD Engineer](https://jobs.opennash.com/companies/microsoft/jobs/c6f51a8f2a250a28e52f/)

Microsoft · United States, Oregon, Hillsboro, California, Mountain View, North Carolina, Raleigh

[Jobs in Austin, TX](/locations/us/tx/austin/)[Jobs in Texas](/locations/us-tx/)[Software Engineering jobs](/functions/software-engineering/)

OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)
