[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Renesas Electronics jobs](https://jobs.opennash.com/companies/renesas-electronics/) · [Search jobs](/search/) Renesas Electronics · Bengaluru, KA, India # Director Engineering, Analog Design (Power ICs) - Chip Lead Bengaluru, KA, India Full-time Director Design Listed on Renesas Electronics’s official careers site. Posted September 8, 2026. Check that it is still open and apply there. [Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000148147539-director-engineering-analog-design-power-ics-chip-lead) [OpenNash Jobs](https://jobs.opennash.com/) / [Renesas Electronics](https://jobs.opennash.com/companies/renesas-electronics/) / Director Engineering, Analog Design (Power ICs) - Chip Lead ## Job description We are seeking a Director, Engineering with deep expertise in mixed-signal IC development to support Renesas' India-focused growth initiatives. This role is technical, cross-functional, and product-defining. The successful candidate will define optimum system architecture for application-specific ICs, spanning analog signal-chain products, high-power delivery, mixed-signal integration, and digital-controller-based architectures. The role will map product needs to existing Renesas IP across business units and identify where new development is required. You will be expected to collaborate across business units, system engineering, analog packaging, back-end, design, test, and operations teams to execute IC development with an efficient cost structure. You will also identify critical skill-set requirements and build the right technical team from scratch. Product & Architecture Leadership Work with product definition / IC architect team to optimize system architecture for application-specific ICs serving India market requirements across automotive, industrial, power, and mixed-signal applications. Understand customer use cases, system requirements, cost targets, and application constraints to optimize architecture Cover a broad technical span, ranging from analog signal-chain products to high-power delivery with digital controllers. Drive architecture trade-offs across performance, integration level, BOM cost, manufacturability, qualification effort, and reuse of existing Renesas technology. Cross-Business Unit IP Reuse & Collaboration Map target architectures to available IP across different business units within Renesas and identify gaps requiring new development. Collaborate with multiple business units, system engineering, analog packaging, back-end, design, test, and operations teams to execute the development plan. Repurpose existing resources and IP wherever practical, while being clear where reuse creates unacceptable product, schedule, or execution risk. Create structured technical alignment across stakeholders who may have different priorities, schedules, and ownership models. Development Execution Lead development programs through concept definition, architecture, specification, planning, execution, verification, validation, qualification, and production handoff. Build execution plans that include ownership, milestones, technical risks, resource needs, cost assumptions, and decision gates. Ensure development choices are grounded in realistic foundry, packaging, test, DFT, qualification, and manufacturing constraints. Collaborate with system engineering teams to define IC requirements and ensure the product solves real application-level problems. Automotive Quality, DFT & Reliability Planning Understand automotive qualification requirements for integrated circuits during design planning and translate them into execution needs. Plan required DFT structures, test coverage, reliability flows, and production test implications early in the design phase. Understand system-level fault behavior, protection needs, and safety-related requirements where relevant to automotive and industrial applications. Create a practical bridge between product ambition and qualification realities, including schedule, cost, and silicon iteration risk. Team Building & Technical Leadership Identify critical skill-set requirements and hire the right people for the development team. Build and mentor a high-quality technical team, including architecture, design, verification, validation, and execution contributors. Assess technical depth during hiring and avoid over-reliance on surface-level experience claims. Represent the program in senior leadership reviews with clear choices, trade-offs, risks, and asks. ## Qualifications 15+ years of experience in mixed-signal IC, analog IC, power IC, or related semiconductor product development. Bachelor or Masters of Electronics Engineering related discipline from a reputed institution. Experience in leading IC development with multiple functional teams is a must for this role. Good understanding of history and future trends in semiconductor industry. Awareness of foundry capabilities for different CMOS, BCD and FET technologies will be an added advantage. Understanding of automotive qualification requirements for integrated circuits in the design phase and ability to plan execution with required DFT circuits. Good understanding of advanced semiconductor packaging technologies and their impact on cost, thermal performance, integration, and manufacturability. Previous experience in building a team from scratch. Comfort and ability to collaborate and be effective in an entrepreneurial (fast-paced and ambiguous) environment. Excellent interpersonal, communication and presentation skills and comfort in presenting to a wide range of audiences. Capable to communicate issues in a concise and effective way. Desire and drive to interact with, as well as ability to build and maintain excellent relationships with internal and external stakeholders. Product ownership mentality with strong affinity to technical depth. Self-driven, strongly motivated individual capable to take full ownership of their activities, and to involve other functions in the company or management when needed to bring them to a successful outcome. Should be motivated to handle unknowns of a beginner. ## At a glance - Posted by the employer: Sep 8, 2026 - First seen by OpenNash: Oct 12, 2026 - Last checked: Oct 12, 2026 - Listed for: 34 days - Location: Bengaluru, KA, India - Employment type: Full-time[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000148147539-director-engineering-analog-design-power-ics-chip-lead) ## More jobs at Renesas Electronics ### [Engineer, Design Verification](https://jobs.opennash.com/companies/renesas-electronics/jobs/b139c1f70b82218e7f7f/) Bengaluru, KA, India ### [Principal Digital Engineer (DFT Design)](https://jobs.opennash.com/companies/renesas-electronics/jobs/59c67013daae5b874af2/) Bengaluru, KA, India ### [Senior Engineer, Analog Circuit Design](https://jobs.opennash.com/companies/renesas-electronics/jobs/dfbd46a1086684155d7a/) Bengaluru, KA, India ### [Senior Engineer, Design Verification (MCU)](https://jobs.opennash.com/companies/renesas-electronics/jobs/91baefee5103b4d3d97d/) Bengaluru, KA, India ### [Senior Staff AMS Design Verification Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/da0f62176673fb2e9980/) Bengaluru, KA, India ## Similar jobs at other companies ### [Serdes PHY Analog Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/457f46cf63e8537f322f/) Qualcomm · Bangalore, India ### [Senior Staff Analog Mixed Signal Design](https://jobs.opennash.com/companies/infineon-technologies/jobs/4b9345c3c4062ae6174f/) Infineon Technologies · Bangalore BTP ### [Staff Engineer Analog Design (f/m/div)](https://jobs.opennash.com/companies/infineon-technologies/jobs/a90e3d416e2f3fa911a5/) Infineon Technologies · Villach ### [Product Engineer – AI-Driven Analog Chip Design](https://jobs.opennash.com/companies/siemens/jobs/87ba9ac3137cbdb4349c/) Siemens OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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