[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Renesas Electronics jobs](https://jobs.opennash.com/companies/renesas-electronics/) · [Search jobs](/search/) Renesas Electronics · Kodaira, Japan # CPU Subsystem Engineering Manager Kodaira, Japan Full-time Manager or lead Operations Listed on Renesas Electronics’s official careers site. Posted April 2, 2026. Check that it is still open and apply there. [Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000118367341-cpu-subsystem-engineering-manager) [OpenNash Jobs](https://jobs.opennash.com/) / [Renesas Electronics](https://jobs.opennash.com/companies/renesas-electronics/) / CPU Subsystem Engineering Manager ## Job description 【Background of the Recruitment】 As automotive electrification and intelligence continue to accelerate, automotive SoCs have become a core technology that directly influences vehicle value. The R-Car series has evolved into a large-scale, high‑performance automotive SoC by integrating a wide range of IPs, including CPU, high‑speed interfaces, memory, AI/video, functional safety, and security. To continuously deliver next‑generation automotive SoCs, our organization is strengthening its SoC IP development capabilities, covering not only in‑house IP development but also the selection, integration, and deployment of third‑party IPs. In particular, within core domains such as the CPU subsystem, the increasing scale and technical complexity of development have further raised the need for leaders who can contribute from both technical and organizational perspectives. This position is intended for professionals who can lead CPU subsystem development while driving long‑term organizational capability, thereby contributing to the sustained evolution of our development organization. 【Job Description】 Serve as an Engineering Manager responsible for leading the CPU subsystem design and development for automotive SoCs (R-Car series), with accountability for both technical decision‑making and organizational leadership. Define and drive the specification and architectural direction of the CPU subsystem, including CPU cores, cache architecture (L1/L2/L3, cache coherency), and memory‑related areas, ensuring quality through design reviews and sound technical judgment. Make prioritization decisions and final judgments at the subsystem level, balancing performance, power, quality, schedule, and resource constraints. Work closely with SoC architects, other subsystem owners, and project management, promoting overall SoC optimization through cross‑functional coordination. Take ownership of resolving critical technical and organizational issues that arise during the design and verification phases. Oversee technical coordination with third‑party IP vendors, including specification alignment, constraint clarification, and issue resolution. Manage a global development organization across Japan, India, and Vietnam, driving role definition, team development, and sustainable execution capability. ※The full details regarding your position scope as well as any future potential changes in work location and job scope will be provided during the interview process. ## Qualifications 【MUST】 Experience serving as a technical lead at subsystem or IP level, including responsibility for design reviews, technical decisions, and design direction. Proven ability to coordinate multiple engineers and stakeholders and drive development forward. Ability to work in English in technical discussions and coordination within a global development environment. Japanese language proficiency at a business level 【WANT】 Experience in a people‑management role, such as Engineering Manager, Section Manager, or equivalent. Experience managing multi‑member and/or multi‑site teams, including offshore development. Experience contributing to resource planning, role assignment, and team development. Experience participating in mid‑ to long‑term technical roadmap or organizational planning. Experience in technical communication with third‑party IP vendors or partners (e.g., specification confirmation, constraint alignment, issue resolution). Hands‑on experience in specification, design, or verification in CPU, CACHE, BUS, or memory‑related areas. Experience in automotive SoC development or projects with high quality and/or functional safety requirements. Knowledge of power domain separation and physical implementation considerations (e.g., P&R). ## At a glance - Posted by the employer: Apr 2, 2026 - First seen by OpenNash: Oct 12, 2026 - Last checked: Oct 19, 2026 - Listed for: 200 days - Location: Kodaira, Japan - Employment type: Full-time[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000118367341-cpu-subsystem-engineering-manager) ## More jobs at Renesas Electronics ### [Application Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/97d0b8aceb7c75c13b01/) Kodaira, Japan ### [Automotive MCU/SoC Test Development & Evaluation Automation Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/9c994a75d4fa47450634/) Kodaira, Japan ### [Edge AI / Embedded AI Development Tool Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/5f0550abdcd4b4ab0049/) Kodaira, Japan ### [HPC AI × ドキュメント構造・生成エンジニア](https://jobs.opennash.com/companies/renesas-electronics/jobs/91a7f1d1efeb13f2b833/) Kodaira, Japan ## Similar jobs at other companies ### [FY27 Intern - Low-Power AI, Audio, and Sensors Subsystem Engineering Internship - ASIC Design / Verification/Implementation - Canada (12 or 16 months)](https://jobs.opennash.com/companies/qualcomm/jobs/c14222ff6c31a736d8ee/) Qualcomm · Markham, Ontario, Canada ### [FY27 Intern - Low-Power AI, Audio, and Sensors Subsystem Engineering Internship - ASIC Firmware / Embedded - Canada (12 or 16 months)](https://jobs.opennash.com/companies/qualcomm/jobs/fd0aec8a6789837ec381/) Qualcomm · Markham, Ontario, Canada ### [Staff Engineer, Product Validation Engineering ( CPU / GPU / NPU) Performance & Benchmarking, 9-13 years, Bangalore](https://jobs.opennash.com/companies/sandisk/jobs/3809ff86925a71e98567/) Sandisk ### [新业务部-软件研发工程师(Cpu&调度方向)](https://jobs.opennash.com/companies/xiaomi/jobs/029f79c45229b1024f9c/) Xiaomi · 上海 ### [CPU–SoC Mask Layout Designer (Diploma Level Contract role) - Silicon Engineering Group (SiG)](https://jobs.opennash.com/companies/intel/jobs/30c80f7a8b13ac3f9045/) Intel OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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