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Renesas Electronics · Ho Chi Minh, Vietnam

# Experienced RTL Design Engineer (3+ Years of Experience)

Ho Chi Minh, Vietnam Full-time Design 

Listed on Renesas Electronics’s official careers site. Posted August 18, 2026. Check that it is still open and apply there.
[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000143976155-experienced-rtl-design-engineer-3-years-of-experience-)

[OpenNash Jobs](https://jobs.opennash.com/) / [Renesas Electronics](https://jobs.opennash.com/companies/renesas-electronics/) / Experienced RTL Design Engineer (3+ Years of Experience)

## Job description

Design and implement PAD/PFC logic for SoC products, including pin multiplexing, boundary scan, test functions, and I/O control logic using in-house PAD design tools and methodologies. Implement PAD logic based on design specifications, pinmux definitions, PAD-RTL/PAD-IO requirements, and integration guidelines. Generate, integrate, and validate PAD logic using in-house tools (e.g., PGA, SCAAPII), ensuring consistency between specifications and generated design outputs.

Analyze and resolve design issues identified by RTL lint, CDC, synthesis, timing, and formal verification tools. Develop automation scripts using Python and Tcl to improve design productivity and flow efficiency. Review verification, formal verification, and signoff results to ensure design quality and completeness. Collaborate with verification, DFT, STA, backend, and architecture teams throughout the design lifecycle.

Support PAD integration, signoff activities, and continuous improvement of PAD design methodologies and environments.

### Job Requirement

Strong RTL design experience using Verilog/SystemVerilog. Understanding of digital design fundamentals, pin multiplexing, and I/O control logic. Good Python scripting skills; Tcl knowledge is a plus. Experience with SpyGlass Lint & CDC, synthesis (Genus/DC), and timing analysis tools (PrimeTime) Knowledge of formal verification (JG-CONN/JG-CSV/JG-FPV) is an advantage. Basic understanding of DFT, boundary scan, and backend implementation is a plus.

Strong self-learning capability and ability to work with in-house design tools. Agile problem-solving, transparent communication, and strong collaboration skills. Ownership mindset with a focus on design quality and continuous improvement.

## At a glance
- Posted by the employer: Aug 18, 2026
- First seen by OpenNash: Oct 12, 2026
- Last checked: Oct 19, 2026
- Listed for: 62 days
- Location: Ho Chi Minh, Vietnam
- Employment type: Full-time[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000143976155-experienced-rtl-design-engineer-3-years-of-experience-)

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