[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Renesas Electronics jobs](https://jobs.opennash.com/companies/renesas-electronics/) · [Search jobs](/search/) Renesas Electronics · Chandler, AZ # Staff Mixed Signal Verification Engineer Chandler, Arizona, United States Full-time Senior individual contributor Operations Listed on Renesas Electronics’s official careers site. Posted September 29, 2026. Check that it is still open and apply there. [Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000152516123-staff-mixed-signal-verification-engineer) [OpenNash Jobs](https://jobs.opennash.com/) / [Renesas Electronics](https://jobs.opennash.com/companies/renesas-electronics/) / Staff Mixed Signal Verification Engineer ## Job description ob Description As a Mixed-Signal Verification Engineer, you will be responsible for the verification and modeling of mixed-signal power management devices, including PMICs, battery chargers, switching regulators, and related analog IP. You will work closely with design, systems, verification, CAD, and customer teams to drive successful development, integration, and sign-off of complex mixed-signal power chips. ### Verification Lead chip-level verification of analog and mixed-signal circuits using AMS and DMS methodologies, integrating analog behavioral models with digital RTL and UVM-based environments. Develop verification strategies, drive coverage closure, and support product tapeout milestones. ### Modeling Create, maintain, and validate behavioral models using SystemVerilog RNM and Verilog-AMS, translating circuit and system requirements into high-performance models suitable for both AMS co-simulation and full-chip DMS verification. Ensure model accuracy through correlation against specifications and schematic references across operating conditions. ### Verification Plan Development Develop and execute comprehensive verification and modeling plans with full traceability from design requirements through coverage closure and tapeout sign-off. Track verification readiness and proactively identify risks to product schedules. ### Debugging Own debug and root-cause analysis of mixed-signal verification issues, including failing test cases, model inaccuracies, analog-digital interface problems, convergence issues, and simulation performance bottlenecks. Drive resolution across design, modeling, and verification teams. ### Technical Leadership & Collaboration Partner with analog and digital designers, system architects, verification engineers, and CAD teams to improve modeling accuracy, simulation efficiency, and verification quality. Participate in architecture and design reviews, influencing design decisions to improve verification effectiveness and reduce project risk. ### Design Review & Optimization Participate in design reviews to evaluate circuit topology and design partitioning from a verification and modeling perspective, recommending architectural choices that simplify behavioral modeling, improve simulation convergence, and reduce verification risk. Support silicon validation and root-cause analysis of complex system-level issues by correlating simulation predictions to bench measurements. ### Documentation Document verification plans, model validation methodologies, coverage results, and sign-off metrics to ensure clear communication and traceability throughout the product lifecycle. ### Customer Interaction Interface directly with external customers to present verification status, review coverage results, address technical questions, and ensure verification deliverables meet product and customer requirements. ## Qualifications ### Education B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field. ### Experience 8-12+ years of experience in mixed-signal verification, AMS/DMS simulation, behavioral modeling, power management IC development, or related semiconductor design activities. Strong experience with switching regulators, battery chargers, PMICs, SystemVerilog, Verilog-AMS, UVM, Cadence Xcelium, Spectre, and mixed-signal verification sign-off methodologies is highly desirable. Experience developing behavioral models and debugging complex analog-digital interactions is a plus. ### Communication Strong communication, teamwork, and customer-facing skills, with the ability to effectively collaborate across cross-functional engineering teams and present technical information to both internal and external stakeholders. ## At a glance - Posted by the employer: Sep 29, 2026 - First seen by OpenNash: Oct 12, 2026 - Last checked: Oct 19, 2026 - Listed for: 20 days - Location: Chandler, Arizona, United States - Employment type: Full-time[Apply on Renesas Electronics’s careers site →](https://jobs.smartrecruiters.com/RenesasElectronics/744000152516123-staff-mixed-signal-verification-engineer) ## More jobs at Renesas Electronics ### [Principal ESD Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/26224f97c86722b007ba/) Chandler, Arizona, United States ### [Principal Process/Device Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/e482d36fea3f41e76498/) Chandler, Arizona, United States ### [Senior Digital Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/fb7ec4b3db20e902531a/) Chandler, Arizona, United States ### [Senior Staff Analog Engineer](https://jobs.opennash.com/companies/renesas-electronics/jobs/c06ad8b8790e2bf72a34/) Chandler, Arizona, United States ## Similar jobs at other companies ### [Senior Staff Engineer, Analog Mixed Signal Design](https://jobs.opennash.com/companies/infineon-technologies/jobs/5bcb6b66b7e1a74b1acf/) Infineon Technologies · Irvine, CA ### [Staff Mixed-Signal Verification – Analog IP](https://jobs.opennash.com/companies/on-semiconductor/jobs/b24ed38bc4e02ee2e75a/) ON Semiconductor · Allen, TX, United States ### [Program Analyst – Mixed Signal IP](https://jobs.opennash.com/companies/qualcomm/jobs/721b03e483355118c553/) Qualcomm · San Diego, California, United States of America ### [Analog/Mixed Signal ASIC Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/798ef1101649c25b5f1d/) Qualcomm · San Diego, California, United States of America [Jobs in Chandler, AZ](/locations/us/az/chandler/)[Jobs in Arizona](/locations/us-az/)[Operations jobs](/functions/operations/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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