[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Qualcomm jobs](https://jobs.opennash.com/companies/qualcomm/) · [Search jobs](/search/) Qualcomm · Hsinchu City, Taiwan # ASIC Design Verification Engineer, up to Sr. Staff Hsinchu City, Taiwan Senior individual contributor Design Listed on Qualcomm’s official careers site. Posted August 31, 2026. Check that it is still open and apply there. [Apply on Qualcomm’s careers site →](https://careers.qualcomm.com/careers/job/446719430954) [OpenNash Jobs](https://jobs.opennash.com/) / [Qualcomm](https://jobs.opennash.com/companies/qualcomm/) / ASIC Design Verification Engineer, up to Sr. Staff ## Job description ### Company Qualcomm Semiconductor Limited ### Job Area Engineering Group, Engineering Group > ASICS Engineering General Summary: Eduication: MS/BS in EE (MS preferred). ### Experience 2–15 years ASIC verification experience. Experience in merchant silicon or switching ASIC (e.g., Broadcom/Marvell/Realtek/MTK networking chips) is desirable. ### Requirements Familiar with ASIC development, especially ASIC verification using System Verilog / UVM, SVA and Coverage-driven methodology, Emulation / FPGA validation Hands-on experience in Ethernet switching / networking ASICs, including: Packet classification and forwarding pipelines Buffer management and QoS mechanisms - Knowledge of protocols (Ethernet, VLAN, TCP/IP, tunneling, TSN, etc.) - Familiarity with Ethernet switching concepts, such as: L2/L3 forwarding, bridging, routing Packet processing pipelines Basic QoS (queuing, scheduling) - Strong debugging and system-level problem-solving skills Scripting skills (C/C++, Tcl, Perl) preferred - Excellent teamwork, interpersonal and communication skills. Fluent in Chinese and English both verbal and written. Ability to work in stressful situations with tight schedules to meet. ### Description of Function & Responsibility - Develop testbench/testcases for Ethernet switch verification from Module level, Subsystem level to System level - Work with Arch/design team on micro-architecture and RTL design of networking blocks, testplan and verification closure Support Design/VI team on pre and post silicon debug - Mentor junior engineers and guide best engineering practices Minimum Qualifications: - Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. ### Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. ### To all Staffing and Recruiting Agencies Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. ## At a glance - Posted by the employer: Aug 31, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 20, 2026 - Listed for: 102 days - Location: Hsinchu City, Taiwan[Apply on Qualcomm’s careers site →](https://careers.qualcomm.com/careers/job/446719430954) ## More jobs at Qualcomm ### [ASICS Design Engineer, Senior to Staff](https://jobs.opennash.com/companies/qualcomm/jobs/e26629a31fd2292fb6f0/) Hsinchu City, Taiwan ### [Baseband Design Engineer, Senior](https://jobs.opennash.com/companies/qualcomm/jobs/8160b64b344e05884c60/) Hsinchu City, Taiwan ### [CPU Physical Design Engineer, Senior to Senior Staff Level](https://jobs.opennash.com/companies/qualcomm/jobs/3145f8c97b24690aaa41/) Hsinchu City, Taiwan ### [CPU RTL Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/dd59a813d1e60a9b6670/) Hsinchu City, Taiwan ### [DRAM Circuit Designer, up to Staff](https://jobs.opennash.com/companies/qualcomm/jobs/cf6fb0f65d4bf2328e87/) Hsinchu City, Taiwan ## Similar jobs at other companies ### [ASIC Verification & Validation Engineer](https://jobs.opennash.com/companies/sandisk/jobs/b95085e1cf95126531eb/) Sandisk ### [Experienced ASIC Verification Engineer](https://jobs.opennash.com/companies/sandisk/jobs/2e3bfeb099c126455dc1/) Sandisk ### [Design Verification Engineer II](https://jobs.opennash.com/companies/microsoft/jobs/e0e64d6ed7ea9cff1d03/) Microsoft · India, Karnataka, Bangalore ### [Principal Formal Design Verification Engineer](https://jobs.opennash.com/companies/microsoft/jobs/77157c255f58687bb52b/) Microsoft · India, Karnataka, Bangalore ### [R&D Engineering, Staff Engineer - Design Verification/ VIP Verification Engineers](https://jobs.opennash.com/companies/synopsys/jobs/20c73d34cbd8b7178cdd/) Synopsys · Delhi, India [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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