[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Qualcomm jobs](https://jobs.opennash.com/companies/qualcomm/) · [Search jobs](/search/) Qualcomm · Hsinchu City, Taiwan # IC Package Layout Engineer, Staff Hsinchu City, Taiwan Senior individual contributor Operations Listed on Qualcomm’s official careers site. Posted July 6, 2026. Check that it is still open and apply there. [Apply on Qualcomm’s careers site →](https://careers.qualcomm.com/careers/job/446719439400) [OpenNash Jobs](https://jobs.opennash.com/) / [Qualcomm](https://jobs.opennash.com/companies/qualcomm/) / IC Package Layout Engineer, Staff ## Job description ### Company Qualcomm Semiconductor Limited ### Job Area Engineering Group, Engineering Group > Packaging Engineering General Summary: Role and Responsibilities - Own and drive advanced package selection, new generation product package structure, and configuration optimization. - Responsible for Package/SIP physical design and layout, optimization, DV, and tape out. - Work with multi-functional teams to achieve optimized mechanical, electrical, and thermal performance for various types of chips. - Implement the physical design of packages and modules for SoC. - Interface and coordinate with multi-functional groups throughout Qualcomm on new product package/SiP feasibility analysis, design, and selection. - Define and develop design verification and automation strategy to strengthen and streamline package design and release flows. - Work multi-functionally to optimize package pin out. - Ensure package design is optimized with SI/PI requirements. - Drive methodology, innovations, and efficiency improvements in package design together with vendors and developers on feature development and bug resolution. - Explore, evaluate, and develop new CAD tools, design, and verification flow. - Partner with BU PD team to optimize chip Floorplan and bump placement and optimize the package size. ### Minimum Qualifications As the IC Package Design Engineer, you demonstrate fundamental knowledge or proven experience in the following: - Bachelor's or Master's degree in electrical engineering, mechanical engineering, material science, or related fields with 3+ years of experience. - Proficient in Cadence APD & SiP. - Basic knowledge in high-speed IO interfaces and electromagnetic field. - Knowledge of IC packaging structures, chip-package, and package-board interaction. - Basic knowledge of electronic packaging process and typical failure modes preferred. ### Preferred Qualifications - Bachelor's or Master's degree in electrical engineering, mechanical engineering, material science, or related fields with 5+ years of experience. - Proven fundamentals in electrical, material, thermal, or mechanical engineering fields. - Familiarity with various sophisticated package configurations and assembly/substrate technology (Flip chip BGA, 2.5D/3D Interposer, etc.). - Experience in package design and proficiency in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP). - Basic understanding of some SI/PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package model extraction, S-parameters, and RLGC model. - Basic knowledge of substrate manufacturing process, structure, design rules, and material properties. - Proven understanding of high-speed interfaces, including DDR, PCIe, UCIE, etc. - Experience with Calibre tool and package design reviews. - Knowledge of high-speed layout constraints (crosstalk mitigation, differential pairs). - Solid understanding of Design Rules Check and Design for Manufacturing. ### Minimum Qualifications - Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 4+ years of System/Package Design/Technology Engineering or related work experience. OR Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 3+ years of System/Package Design/Technology Engineering or related work experience. OR PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or related field and 2+ year of System/Package Design/Technology Engineering or related work experience. ### Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. ### To all Staffing and Recruiting Agencies Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. ## At a glance - Posted by the employer: Jul 6, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 20, 2026 - Listed for: 106 days - Location: Hsinchu City, Taiwan[Apply on Qualcomm’s careers site →](https://careers.qualcomm.com/careers/job/446719439400) ## More jobs at Qualcomm ### [(Structural ATPG) APAC Digital SOC Test Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/893021f204c7d3b64ad4/) Hsinchu City, Taiwan ### [ADT System Level Test Engineer, up to Sr.](https://jobs.opennash.com/companies/qualcomm/jobs/17b4983c3bae218073fb/) Hsinchu City, Taiwan ### [ASIC DV Engineer, Principal/Mgr](https://jobs.opennash.com/companies/qualcomm/jobs/f023f4c9967dfe9e7a12/) Hsinchu City, Taiwan ### [Advanced Node Process and Yield Diagnostics Engineer, Staff](https://jobs.opennash.com/companies/qualcomm/jobs/f01b6798a6f57c3e187c/) Hsinchu City, Taiwan ### [Architecture/System Validation Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/b21e5dd59265d6c5a121/) Hsinchu City, Taiwan ## Similar jobs at other companies ### [Staff Engineer Analog Layout](https://jobs.opennash.com/companies/infineon-technologies/jobs/dae39b856c85418d4dfc/) Infineon Technologies · Hanoi ### [Staff Engineer Analog Layout](https://jobs.opennash.com/companies/infineon-technologies/jobs/a6206d71c9dd6693d96d/) Infineon Technologies · Penang ### [Staff Layout Engineer – DPG Layout](https://jobs.opennash.com/companies/micron-technology/jobs/f6d417e3cd6852c8de61/) Micron Technology · Hyderabad - Phoenix Aquila, India ### [Senior Package Layout Engineer - Hardware](https://jobs.opennash.com/companies/nvidia/jobs/36482ddb894abe3698cc/) NVIDIA · India, Bengaluru ### [Senior Package Layout Engineer](https://jobs.opennash.com/companies/nvidia/jobs/df2a50c8ad6b59f6257f/) NVIDIA · Israel, Yokneam OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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