[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) ON Semiconductor · Gresham, OR # Process Integration Engineer Gresham, OR, United States Operations Listed on ON Semiconductor ’s official careers site. Posted October 30, 2026. Check that it is still open and apply there. [Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2506979) [OpenNash Jobs](https://jobs.opennash.com/) / [ON Semiconductor ](https://jobs.opennash.com/companies/on-semiconductor/) / Process Integration Engineer ## Job description The Process Integration and Technology Development Engineer defines, develops, and implements silicon process technology for the manufacture of integrated silicon devices. The successful candidate will be responsible for unit/process module development, process flow implementation, design rule definition, device architecture, electrical characterization, and technology qualification. These tasks support new silicon technology developments and transfers of existing technologies in and out of the resident fab. Experience related to semiconductor processing in BCD, Discretes, and hybrid Smart Power technologies and knowledge of semiconductor device functions is required. ## Responsibilities Process Integration and Technology Development Lead the development of unit processes and process modules for CMOS, BCD, Discretes, and hybrid Smart Power technologies. Define and assess process module characterization to ensure robustness, manufacturability, and scalability. Develop and maintain end-to-end technology process flows with detailed process specifications. Define physical design rules and test structures for characterization. Drive process and device optimization to meet performance, reliability, and cost targets. Design and analyze statistical experiments using DOE, regression, and AI-assisted methods to optimize device architecture and process modules. Support intrinsic reliability studies, including gate oxide integrity, TDDB, HCI, EM, and stress migration, using both physics-based and data-driven approaches. Manufacturing, Yield & Technology Transfer Facilitate process improvements and corrective actions for yield, reliability, and manufacturability issues using root-cause analysis and data mining and analysis. Support Process Engineering and Yield Engineering teams to improve process quality and yield for technologies released to manufacturing. Enable smooth technology transfers into and out of the fab by using data-driven monitoring, excursion detection, and learning systems. ## Qualifications Required MS or PhD in Electrical Engineering, Physics, Chemistry, Chemical Engineering, Materials Engineering, or related technical field. Minimum of 10 years’ experience in semiconductor manufacturing or process development or process integration in a semiconductor manufacturing environment. Knowledge of semiconductor processes such as oxidation, implant, deposition (CVD, PECVD, etc.), RIE, CMP, Lithography used in FEOL and BEOL wafer fabrication. Experience applying DOE, statistical analysis, and data analytics to semiconductor development. Understanding of semiconductor device physics and construction, including CMOS, DMOS, Bipolar, and Trench FET devices. Strong written and verbal communication skills with the ability to convey complex technical concepts clearly. Proven problem-solving ability and strong collaboration skills in cross-functional teams. Preferred Experience with 180 nm through 40 nm technologies. Knowledge of intrinsic reliability testing methodologies, including GOI, VRamp, TDDB, HCI, EM, and SM. Hands-on experience with process and device TCAD simulations. Experience designing and evaluating physical and electrical design rule test structures. Familiarity with AI/ML techniques, data mining, or statistical modeling applied to semiconductor process or device data. Experience using scripting languages (e.g., Python, MATLAB, JMP, or equivalent) for data analysis, automation, or model development. ## At a glance - Posted by the employer: Oct 30, 2026 - First seen by OpenNash: Nov 1, 2026 - Last checked: Nov 8, 2026 - Listed for: 9 days - Location: Gresham, OR, United States[Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2506979) ## Hiring at ON Semiconductor - Open jobs: 716 - New in the last 7 days: After two weekly collections - Tracked since: Jul 10, 2026 [All ON Semiconductor jobs](https://jobs.opennash.com/companies/on-semiconductor/) · [Weekly hiring report](/reports/hiring/) ## More jobs at ON Semiconductor ### [Device Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/9ca150ad364b4965c697/) Gresham, OR, United States ### [Process Integration and Technology Development Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/e181b14e272facf2d762/) Gresham, OR, United States ### [ReRAM Memory and AI Development Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/83150bd3102e6c85b69f/) Gresham, OR, United States ### [Yield Enhancement Systems Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/fd758cc6633bd63b996b/) Gresham, OR, United States ### [Equipment Maintenance Engineer - Photolithography](https://jobs.opennash.com/companies/on-semiconductor/jobs/cf467137eb225ee37815/) Gresham, OR, United States ## Similar jobs at other companies ### [Dewar Process Integration Engineer Sr](https://jobs.opennash.com/companies/lockheed-martin/jobs/29802de3ac174f9fa6fd/) Lockheed Martin · Goleta, CA ### [Semiconductor Process Integration Engineer Sr](https://jobs.opennash.com/companies/lockheed-martin/jobs/0a5d4f76ebb271153c2b/) Lockheed Martin · Goleta, CA ### [Senior Engineer, FECOS cPIE Process Integration (Loop Integration)](https://jobs.opennash.com/companies/micron-technology/jobs/e86c99f82142776e0d31/) Micron Technology · Boise ### [Process Integration Engineer](https://jobs.opennash.com/companies/teledyne-technologies/jobs/4e3a6b3e1cf6ae61df50/) Teledyne Technologies · Camarillo, US, CA ### [MTS, Photonic Process Integration Engineer](https://jobs.opennash.com/companies/coherent/jobs/9fa24d40e6d00992cbb8/) Coherent · Fremont, CA, United States OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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