[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All ON Semiconductor jobs](https://jobs.opennash.com/companies/on-semiconductor/) · [Search jobs](/search/) ON Semiconductor · Bangalore, Karnataka, India # Senior Digital IP Design Manager Bangalore, Karnataka, India Manager or lead Design Listed on ON Semiconductor ’s official careers site. Posted June 16, 2026. Check that it is still open and apply there. [Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2505674) [OpenNash Jobs](https://jobs.opennash.com/) / [ON Semiconductor ](https://jobs.opennash.com/companies/on-semiconductor/) / Senior Digital IP Design Manager ## Job description ### Job Description Job Summary: Sr/ Digital IP Design Manager Location: Bangalore, India Company: onsemi Role Overview onsemi is seeking a Digital IP Design Manager to manage the design of digital datapath and subsystem IP for next-generation CMOS image sensors and the onsemi Treo platform. This role will manage a talented sub-team of digital design engineers, drive technical execution, and help shape the future of scalable, automotive‑grade digital IP design. The ideal candidate combines strong hands-on digital design expertise with necessary experience of people leadership, and a forward-looking mindset, including curiosity around how AI and automation can improve digital design productivity and cycle time. ### Key Responsibilities Technical Leadership Lead the design of digital datapath IP and modules for CMOS image sensors, including high‑performance, low‑power pipelines. Drive development of core platform digital-on-top and subsystem IP for the onsemi Treo platform. Ensure IP meets automotive quality, safety, and reliability requirements (e.g., robustness, configurability, reuse). Partner closely with architecture, DV, PD, analog, mixed-signal, system, full-chip integration, firmware, and software teams to deliver end-to-end solutions. Provide technical guidance on RTL quality, low-power design, clocking/reset strategies, and design-for-test to design engineers. Participate in technical reviews, risk assessment, and post-silicon learning. Team & People Management Lead and mentor talented digital IP designers. Bring quality, flow and schedule focus to the team. Foster collaboration, accountability, innovation and continuous improvement. Innovation & Productivity Stay curious and engaged with emerging trends, especially AI/ML-driven approaches to: RTL generation and review Integration and Si debug productivity Design-space exploration Champion adoption of tools and processes that reduce cycle time and improve first-time-right outcomes #LI-VS1 ## Responsibilities Preferred / Nice-to-Have Qualifications Experience with CMOS image sensor digital pipelines or imaging-related IP. Familiarity with platform or subsystem-level IP development. Exposure to functional safety concepts relevant to automotive products. Experience driving or adopting EDA automation, scripting, or AI-assisted workflows. Prior experience scaling or building a new team. #LI-VS1 ## Qualifications ### Required Qualifications 12+ years of overall experience in digital IC design. 3+ years of proven people management or technical leadership experience. Strong background in digital IP or SoC development. Experience working on Automotive IP or automotive semiconductor products. Hands-on experience with: RTL design (SystemVerilog / Verilog) Low-power design techniques IP reuse and configurability Demonstrated ability to lead cross-functional technical efforts. Strong communication skills and the ability to influence across teams and geographies. #LI-VS1 ## At a glance - Posted by the employer: Jun 16, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 18, 2026 - Listed for: 124 days - Location: Bangalore, Karnataka, India[Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2505674) ## More jobs at ON Semiconductor ### [ASIC / Digital Design Director of Engineering](https://jobs.opennash.com/companies/on-semiconductor/jobs/454fda817271433b227e/) Bangalore, Karnataka, India ### [Algorithm Design Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/e758c47161f9989c9b21/) Bangalore, Karnataka, India ### [Analog Design Engg - II](https://jobs.opennash.com/companies/on-semiconductor/jobs/d0cd0818ab568f6329d4/) Bangalore, Karnataka, India ### [Analog Staff Design Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/6d7b9137302f1649e869/) Bangalore, Karnataka, India ## Similar jobs at other companies ### [Staff / Senior Staff Engineer Digital Design (RTL Design)](https://jobs.opennash.com/companies/infineon-technologies/jobs/bcdb3b7a61b92eede1d2/) Infineon Technologies · Singapore ### [Senior / Staff Engineer - Digital Design](https://jobs.opennash.com/companies/infineon-technologies/jobs/6af7082b2823e36216a0/) Infineon Technologies · Singapore ### [Digital Design Verification Engineer, Staff](https://jobs.opennash.com/companies/qualcomm/jobs/a645ad2a0d00db966bb8/) Qualcomm · Toronto, Ontario, Canada ### [Digital Design R&D Engineer (Lead/Staff)](https://jobs.opennash.com/companies/qualcomm/jobs/0573bd8ee5eabfcd66a7/) Qualcomm · Bangalore, India ### [Lead Engineer - Digital Design](https://jobs.opennash.com/companies/eaton/jobs/6e5c212cf2b7e641eb70/) Eaton · Hadapsar, Pune, Maharashtra, IND [Design jobs](/functions/design/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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