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ON Semiconductor · Bangalore, Karnataka, India

# Analog Layout Engineer

Bangalore, Karnataka, India Operations 

Listed on ON Semiconductor ’s official careers site. Posted September 24, 2026. Check that it is still open and apply there.
[Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2506717)

[OpenNash Jobs](https://jobs.opennash.com/) / [ON Semiconductor ](https://jobs.opennash.com/companies/on-semiconductor/) / Analog Layout Engineer

## Job description

Onsemi is seeking a Senior Analog Layout Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and e-fuses for consumer, industrial and automotive applications.

In this role, you will focus on the following
- Produce high quality layout for complex AMS IP blocks (voltage regulators, bandgap, current sense-amp, amplifier, high voltage switches, drivers etc)
- Work on layouts of block/module level for integrated circuits from schematics.

Verify using design rules provided by technology and design engineering. Work on layout floor planning of schematic block/module level, power routing, latch-up, ESD layout and area optimization using best layout techniques considering mismatch and process variations. Able to perform DRC, LVS, LVL, LEF generation, ERC, Antenna, Density and EM checks. Working with team members/design engineers for innovative, optimal solutions Using production quality workflow and documentation procedures #LI-LK1

## Qualifications

### Minimum Requirements

BS in Electrical Engineering or related
- 2 years of experience, Qualification Experience in delivering high quality analog layout IPs Good understanding of layout fundamentals and best practices
- Proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports Programming knowledge in SKILL, Perl, and/or Python is a bonus Experience with CADENCE or MENTOR GRAPHICS layout tools
- Solid understanding of semiconductor manufacturing process and DFM techniques
- Proficient at debugging/fixing LVS/DRC errors
- Must be familiar with Cadence Design Environment (CDE) and Unix OS Must have strong communication skills and be a team player #LI-LK1

## At a glance
- Posted by the employer: Sep 24, 2026
- First seen by OpenNash: Oct 11, 2026
- Last checked: Oct 18, 2026
- Listed for: 24 days
- Location: Bangalore, Karnataka, India[Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2506717)

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