[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All ON Semiconductor jobs](https://jobs.opennash.com/companies/on-semiconductor/) · [Search jobs](/search/) ON Semiconductor · Bangalore, Karnataka, India # Staff ASIC Verification Engineer Bangalore, Karnataka, India Senior individual contributor Operations Listed on ON Semiconductor ’s official careers site. Posted September 7, 2026. Check that it is still open and apply there. [Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2506066) [OpenNash Jobs](https://jobs.opennash.com/) / [ON Semiconductor ](https://jobs.opennash.com/companies/on-semiconductor/) / Staff ASIC Verification Engineer ## Job description Job Description – ASIC/SoC Verification Engineer We are seeking an experienced Staff ASIC/SoC Verification Engineer to join our dynamic and fast‑paced engineering team. In this role, you will be responsible for ensuring the functional correctness, robustness, and overall quality of our cutting‑edge semiconductor and SoC designs. If you thrive in a collaborative environment and enjoy solving complex technical challenges, this opportunity is an excellent fit. #LI-VS1 ## Responsibilities ### Responsibilities Verification Planning and Execution: Develop and execute comprehensive verification plans. Close verification with coverage closure, ensuring high-quality results. Apply standard ASIC verification techniques, including test planning, testbench creation, code and functional coverage, directed and random stimulus generation, and assertions. ### Testbench Development Create and enhance testbenches using SystemVerilog (OVM/UVM) or other standard testbench languages. Implement reusable Verification IP (VIP) components. Collaborate with third-party VIP providers. ### Methodology and Flows Demonstrate a solid understanding of ASIC design and verification methodologies. Apply object-oriented programming principles effectively. Implement constraint random verification methodology. ### Technical Skills Proficiency in SystemVerilog (OVM/UVM) and other relevant languages (C/C++, Perl, Tcl, Python, Verilog PLI). Familiarity with industry standards (e.g., I2C/SPI). Experience with low-power verification using UPF (Unified Power Format) is a plus. Knowledge of formal verification techniques is advantageous. ### Collaboration and Communication Work effectively with internal teams and external customers. Strong written and verbal communication skills. Initiative, analytical problem-solving abilities, and adaptability within a diverse team environment. #LI-VS1 ## Qualifications ### Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. 10 Years of experience in SoC/IP verification,. Strong expertise in SystemVerilog, UVM, and advanced verification methodologies. Hands-on experience with ARM-based SoC architectures, AMBA protocols (AXI/AHB/APB), and system-level interactions. Proven ability to build reusable, scalable testbench architectures. Solid understanding of test planning, coverage-driven verification, and verification metrics. Experience with GLS, timing verification, and debug. Knowledge of power-aware verification (UPF/CPF). Strong scripting and automation skills (Python, Perl, Shell, Make, etc.). Exposure to AI/ML techniques applied to verification (e.g., intelligent stimulus generation, failure triage, coverage optimization). Excellent problem-solving, debugging, and communication skills. #LI-VS1 ## At a glance - Posted by the employer: Sep 7, 2026 - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 41 days - Location: Bangalore, Karnataka, India[Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2506066) ## More jobs at ON Semiconductor ### [Analog Layout Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/f8d36f4ce6921f944892/) Bangalore, Karnataka, India ### [DFT Principal Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/e4715584c282f81d069e/) Bangalore, Karnataka, India ### [EDA Simulation Automation Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/6313115c18d3f6360417/) Bangalore, Karnataka, India ### [Layout Engineer, Power Modules](https://jobs.opennash.com/companies/on-semiconductor/jobs/16ad47c8693b5d0575a9/) Bangalore, Karnataka, India ## Similar jobs at other companies ### [ASIC/FPGA Design Verification Engineer, Sr Staff](https://jobs.opennash.com/companies/qualcomm/jobs/69d6f3cd57809dabf76d/) Qualcomm · Ottawa, Ontario, Canada ### [Staff Engineer, ASIC Development Engineering (Verification, Scripting) with 8-12 years of experience](https://jobs.opennash.com/companies/sandisk/jobs/08ac9916bb56784c4f47/) Sandisk ### [Staff ASIC Digital Engineer (SOC Verification, PCIe) with 8 to 12 years of experience](https://jobs.opennash.com/companies/sandisk/jobs/3d2b2a850dec23a8b655/) Sandisk ### [ASIC/FPGA Design Verification Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/b9ebab233b8dca4884ac/) Qualcomm · Ottawa, Ontario, Canada ### [Staff Engineer Verification -IP Digital Functional Verification](https://jobs.opennash.com/companies/infineon-technologies/jobs/fff24ca2b5893cf8106f/) Infineon Technologies · Bangalore BTP OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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