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ON Semiconductor · Bangalore, Karnataka, India

# Staff Analog layout Engineer

Bangalore, Karnataka, India Senior individual contributor Operations 

Listed on ON Semiconductor ’s official careers site. Posted August 27, 2026. Check that it is still open and apply there.
[Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2506096)

[OpenNash Jobs](https://jobs.opennash.com/) / [ON Semiconductor ](https://jobs.opennash.com/companies/on-semiconductor/) / Staff Analog layout Engineer

## Job description

OnSemi is seeking a Staff Analog layout Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and e-fuses for consumer, industrial and automotive applications. In this role, you will focus on the following. #LI-RG1

## Responsibilities
- Produce high quality layout for complex AMS IP blocks (voltage regulators, bandgap, current sense-amp, amplifier, high voltage switches, drivers etc)
- Contribute to area estimation and optimization, floor planning, power routing, shielding, physical verification (DRC, ERC, LVS, ESD, etc.), as well power analysis (EM / IR-Drop)
- Contribute and support team in taping out high-performance microcontroller chip Actively seek out opportunities to work with cross-functional teams (Chip team, Tech, CAD)
- Develop scripts and methods for layout design automation #LI-RG1

## Qualifications

BE in Electrical Engineering or related + 7 years of experience, or MS +6 years of experience preferred with experience in analog/mixed-signal layout design of deep submicron CMOS and BCD technologies Qualification Experience in delivering high quality analog layout IPs Good understanding of layout fundamentals and best practices
- Proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports Programming knowledge in SKILL, Perl, and/or Python is a bonus Experience with CADENCE or MENTOR GRAPHICS layout tools
- Solid understanding of semiconductor manufacturing process and DFM techniques
- Proficient at debugging/fixing LVS/DRC errors
- Must be familiar with Cadence Design Environment (CDE) and Unix OS Must have strong communication skills and be a team player #LI-RG1

## At a glance
- Posted by the employer: Aug 27, 2026
- First seen by OpenNash: Oct 11, 2026
- Last checked: Oct 18, 2026
- Listed for: 52 days
- Location: Bangalore, Karnataka, India[Apply on ON Semiconductor ’s careers site →](https://hctz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX_1001/job/2506096)

## More jobs at ON Semiconductor 

### [Analog Layout Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/f8d36f4ce6921f944892/)

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### [DFT Principal Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/e4715584c282f81d069e/)

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### [EDA Simulation Automation Engineer](https://jobs.opennash.com/companies/on-semiconductor/jobs/6313115c18d3f6360417/)

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### [Layout Engineer, Power Modules](https://jobs.opennash.com/companies/on-semiconductor/jobs/16ad47c8693b5d0575a9/)

Bangalore, Karnataka, India

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