[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NXP Semiconductors jobs](https://jobs.opennash.com/companies/nxp-semiconductors/) · [Search jobs](/search/) NXP Semiconductors · Multiple locations # Principal SoC Chip Lead Multiple locations Manager or lead Listed on NXP Semiconductors’s official careers site. Listed as of October 19, 2026. Check that it is still open and apply there. [Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Shanghai-Pudong/Principal-SoC-Chip-Lead---Technical-Project-Lead_R-10065808-1) [OpenNash Jobs](https://jobs.opennash.com/) / [NXP Semiconductors](https://jobs.opennash.com/companies/nxp-semiconductors/) / Principal SoC Chip Lead ## Job description ### Responsibilities End-to-End Project Ownership: Own SoC program execution from project definition through tape-out and post-silicon support. Ensure on-time, high-quality delivery of key milestones and coordinate engineering support during silicon bring-up, validation, and debug. ### Technical Leadership Drive technical decision-making across architecture, integration, verification, implementation, validation, and system teams. Serve as the overall technical execution owner for assigned projects. ### Cross-Functional Coordination Lead and align Architecture, RTL, DFT, Verification, Emulation, Physical Design, AMS, IP, and related engineering teams. Resolve technical dependencies, execution bottlenecks, and critical project risks. ### Program Execution & Risk Management Develop and maintain project execution plans together with PMO and SoC PM. Monitor schedule, resource demand, critical paths, and risk mitigation plans; drive recovery actions when milestones are at risk. ### Stakeholder Management Partner with Product Marketing, System Architecture, System Engineering, NPI PM, BU management, and external stakeholders. Communicate project status, technical readiness, key risks, and mitigation plans during management and milestone reviews. ### Tape-Out & Silicon Readiness Own overall tape-out readiness, including integration quality, signoff closure, cross-functional alignment, and risk management. Coordinate post-silicon validation activities and engineering resources to support silicon bring-up and issue resolution. ### Requirements Bachelor's degree or higher in Microelectronics, Electrical Engineering, or related disciplines. 6+ years of semiconductor industry experience. Proven experience in SoC development from architecture through tape-out. ### Strong understanding of SoC development flows including Architecture, RTL Design, Integration, Verification, DFT, Emulation, Physical Design, Silicon Validation. Experience leading large cross-functional engineering teams. Strong project execution, planning, and risk management skills. Excellent communication, leadership, and stakeholder management capabilities. Ability to influence technical direction and drive execution in a matrix organization. ### Preferred Qualifications Previous experience as: Chip Lead / SoC Technical Lead / Chief Engineer / Project Technical Leader Experience with automotive, industrial, or safety-critical semiconductor products. Experience working with global development teams across multiple sites. Successful delivery of multiple SoC tape-outs and post-silicon product ramps. ### Core Competencies Technical Leadership Cross-functional Collaboration Project Execution Excellence Risk Management Strategic Thinking Problem Solving & Decision Making Stakeholder Management Communication & Influence Customer Focus Results Orientation More information about NXP in Greater China... #LI-d6f4 ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 12, 2026 - Last checked: Oct 19, 2026 - Listed for: 7 days - Location: Multiple locations[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Shanghai-Pudong/Principal-SoC-Chip-Lead---Technical-Project-Lead_R-10065808-1) ## More jobs at NXP Semiconductors ### [-搶先投遞- 高雄/台北 2027 學生實習計畫](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/44d705f3ec9822b7c54d/) ### [BootROM Lead Architect](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/c6b418a0cefa8b8af3f9/) ### [CoreRide Program Manager (f/m/d)](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/2a10ef4ef06d2d77aa40/) ### [Customer Program Manager, Europe (SDV & Vehicle Compute)](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/143452c0192e3278f631/) ### [Energy and Power System Architect (f/m/d)](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/a7069ce8b8f7f40dce93/) ## Similar jobs at other companies ### [Principal ASIC Chip Design Engineer](https://jobs.opennash.com/companies/nvidia/jobs/a46aaa277683d79615ec/) NVIDIA ### [Principal Verification Chip Design Engineer](https://jobs.opennash.com/companies/nvidia/jobs/94e4fa77a9a756ba6f60/) NVIDIA ### [SOC Verification Principal Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/287d6238eb14a245feeb/) Qualcomm · Bangalore, India ### [Principal SOC Performance Verification Engineer](https://jobs.opennash.com/companies/microsoft/jobs/4978befbe1d83beb7e57/) Microsoft · India, Karnataka, Bangalore ### [SoC STA/Timing Engineer (Senior Staff/Principal)](https://jobs.opennash.com/companies/qualcomm/jobs/84dd17ebe4cab9226ef2/) Qualcomm · Bangalore, India OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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