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NXP Semiconductors · Chandler

# Senior DfT Engineer

Chandler Senior individual contributor Operations 

Listed on NXP Semiconductors’s official careers site. Listed as of October 19, 2026. Check that it is still open and apply there.
[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Chandler-Office/Senior-DfT-Engineer_R-10064841)

[OpenNash Jobs](https://jobs.opennash.com/) / [NXP Semiconductors](https://jobs.opennash.com/companies/nxp-semiconductors/) / Senior DfT Engineer

## Job description

As a DfT engineer, you will join a highly experienced team.

Your key responsibilities will be:
- Closely collaborate with Product Definer, Analog Design Lead, Digital Design Lead, Test Lead, Product Engineer, Quality Engineer, Validation Engineer – to identify the superset of requirements for Testability of the chip (Functional mode, Debug mode, ATPG).
- Gain deep understanding on existing and innovative ways to insert DfT for complex analog and mixed-signal IPs, standard Macros (RAM, ROM, NVM, ADC, DAC) and complex digital logic.
- High-quality of RTL design using Verilog and System-Verilog
- Define Verification Plan for the implemented features and write tests, debug and get those passing at Chiptop level DV environment
- Scan insertion, optimization, length balancing, P&R-aware rerouting of chains, Test-Point insertion, ATPG patterns generation, simulation and debug
- Support Test Engineers during debug of patterns on new silicon, and on customer returns
- Participate in Design & Test Review meetings and support the team for DfT
- Generate comprehensive DfT Architecture & Design documentation and maintain it to match later updates
- Troubleshoot and resolve issues related to DfT throughout the development lifecycle
- Stay updated with the latest industry trends, tools, and methodologies in DfT design Job Qualification: Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL coding, DfT, Computer Architecture, Digital Verification.

Minimum 3 years of experience in similar role of DfT, Digital Design & Architecture. Seeking 3-8 years total experience for this role Willing to relocate to Phoenix Metro area (Arizona) and minimum 3 days per week full-day presence in NXP's Chandler office Excellent on problem-solving, teamwork, planning, organizing, attention to detail and communication skills. More information about NXP in the United States... NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law.

In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #LI-6692

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 12, 2026
- Last checked: Oct 19, 2026
- Listed for: 7 days
- Location: Chandler[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Chandler-Office/Senior-DfT-Engineer_R-10064841)

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