[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NXP Semiconductors jobs](https://jobs.opennash.com/companies/nxp-semiconductors/) · [Search jobs](/search/) NXP Semiconductors · Bangalore # Staff Digital Design Engineer Bangalore Senior individual contributor Design Listed on NXP Semiconductors’s official careers site. Listed as of October 19, 2026. Check that it is still open and apply there. [Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Bangalore/Staff-Digital-Design-Engineer_R-10062734) [OpenNash Jobs](https://jobs.opennash.com/) / [NXP Semiconductors](https://jobs.opennash.com/companies/nxp-semiconductors/) / Staff Digital Design Engineer ## Job description ### Role Summary We are seeking a Senior Lead Digital Designer to lead the architecture, implementation, and integration of digital subsystems for Automotive Ethernet PHY products (10BASE‑T1S, 100BASE‑T1, 1000BASE‑T1, and multi‑gig automotive SerDes technologies). The role involves driving digital micro-architecture, state machines, PCS functionality, safety mechanisms, and end‑to‑end digital design across the PHY. ### Key Responsibilities - Architecture & Technical Leadership - Define and own digital subsystem micro‑architecture for Automotive Ethernet PHYs, including: PCS pipelines and encoding/decoding logic Scramblers/descramblers, CRC engines, alignment & framing Packet processing, link monitoring, error handling Interface logic (MII, RMII, RGMII, GMII, XGMII depending on product line) Processor based SoC design - Perform system‑level partitioning between digital, analog/mixed-signal, and firmware components. - Lead feasibility studies, power/performance trade-offs, and digital architecture exploration. - RTL Design & Implementation Develop high-quality RTL (Verilog/SystemVerilog) for control, datapath, and protocol logic. ### Drive digital front-end flows including Lint, CDC/RDC, reset architecture, synthesis guidance Timing constraints and logic optimization Work with DV to define coverage goals, corner cases, and feature verification plans. - System‑Level Ownership Translate system requirements, IEEE 802.3 specifications, and architecture documents into robust digital designs. ### Work with mixed-signal teams to define Control interfaces to analog front‑end blocks Calibration engines, register programming flows, and digital‑analog interaction models Contribute to bring‑up sequences, compliance testing, and system validation. - Automotive Quality & Functional Safety Ensure compliance with Automotive Ethernet standards, ISO 26262, and AEC‑Q100 expectations. ### Define and implement Safety mechanisms (BIST, LBIST/MBIST, error detection schemes) Diagnostic monitors, timeout recovery logic, watchdogs, and fault reporting Participate in FMEDA, DFA, and functional safety analysis. ### Required Qualifications Masters in Electrical Engineering, Computer Engineering, or related discipline. 7+ years experience in digital design for PHY, SerDes, networking ASICs, or communication ICs. Strong expertise in: Verilog/SystemVerilog RTL design High‑speed digital logic, state machines, control logic IEEE 802.3 Ethernet PCS, link training, and system control flows Synthesis, STA, CDC/RDC methodology Proven track record across multiple production tape-outs. ### Preferred Qualifications Experience with Automotive Ethernet standards: 10BASE‑T1S, 100BASE‑T1, 1000BASE‑T1, 10GBASE‑T1. Familiarity with PHY firmware-driven initialization and configuration flows. Strong debugging skills with logic analyzers, protocol analyzers, and post-silicon validation. Background in safety‑critical digital logic designs. More information about NXP in India... #LI-7013 ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 12, 2026 - Last checked: Oct 19, 2026 - Listed for: 7 days - Location: Bangalore[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Bangalore/Staff-Digital-Design-Engineer_R-10062734) ## More jobs at NXP Semiconductors ### [AI/ML driven ASIC Design and Implementation Automation Lead Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/f8c7907d324630f71679/) Bangalore ### [AI/ML driven ASIC Design and Implementation Principal Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/b87e54657b568c2f9d01/) Bangalore ### [Digital Design Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/e18c944b69ab71cb843f/) Bangalore ### [Lead I/O Design Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/8732c23fa6a45e540d54/) Bangalore ## Similar jobs at other companies ### [Staff Engineer Design](https://jobs.opennash.com/companies/infineon-technologies/jobs/1d83df347a71cda38084/) Infineon Technologies · Bangalore ### [Digital Design Verification Engineer, Staff](https://jobs.opennash.com/companies/qualcomm/jobs/a645ad2a0d00db966bb8/) Qualcomm · Toronto, Ontario, Canada ### [Digital Design R&D Engineer (Lead/Staff)](https://jobs.opennash.com/companies/qualcomm/jobs/0573bd8ee5eabfcd66a7/) Qualcomm · Bangalore, India ### [Senior Staff Datapath Design Engineer and Circuit Design Engineer, VLSI Design Engineering](https://jobs.opennash.com/companies/sandisk/jobs/9c9c9ee8de475c168163/) Sandisk OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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