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NXP Semiconductors · Noida

# Lead DFT Engineer

Noida Manager or lead Operations 

Listed on NXP Semiconductors’s official careers site. Posted September 24, 2026. Check that it is still open and apply there.
[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Noida/Lead-DFT-Engineer_R-10064000)

[OpenNash Jobs](https://jobs.opennash.com/) / [NXP Semiconductors](https://jobs.opennash.com/companies/nxp-semiconductors/) / Lead DFT Engineer

## Job description

Digital Design Engineer with hand on experience in Scan insertion, ATPG, GLS. He/She will be responsible for understanding the DFT architecture of the design and providing the scan insertion collaterals to the implementation team, to enable scan insertion flows during synthesis. Should have proficiency in industry-standard DFT tools such as Mentor Tessent, Synopsys DFT Compiler, Cadence Encounter Test. Should be able to contribute to ATPG at partition and SoC level..

Should have experience with DFT GLS simulation tools and methodologies, including fault modeling and coverage analysis. Should be familiar with industry standards such as IEEE 1149.1 (JTAG) and IEEE 1687 (IJTAG). Effective communication and teamwork skills, with the ability to collaborate across functions. More information about NXP in India... #LI-2734

## At a glance
- Posted by the employer: Sep 24, 2026
- First seen by OpenNash: Oct 12, 2026
- Last checked: Oct 19, 2026
- Listed for: 25 days
- Location: Noida[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Noida/Lead-DFT-Engineer_R-10064000)

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