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NXP Semiconductors · Pune

# Technical Director, SoC Architect

Pune Director Executive & Management 

Listed on NXP Semiconductors’s official careers site. Listed as of October 19, 2026. Check that it is still open and apply there.
[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Pune/SoC-Architect_R-10063132-1)

[OpenNash Jobs](https://jobs.opennash.com/) / [NXP Semiconductors](https://jobs.opennash.com/companies/nxp-semiconductors/) / Technical Director, SoC Architect

## Job description

### Role Overview

As an MCU SoC Architect, you will define and drive the architecture of next-generation microcontrollers. You will lead architectural decisions that balance real‑time determinism, performance, power efficiency, safety, and security, enabling scalable MCU products across industrial, automotive, and IoT markets. You will work closely with SoC design teams, system architects, IP owners, software architects, and product planning to deliver competitive, production ready architectures.

This role requires deep expertise across MCU architectures, SoC integration, clock/reset/power design, memory subsystems, and microarchitectural trade‑offs, with a strong focus on real‑time and low‑power constraints. Join our team to build high‑performance, power‑efficient, and secure MCU architectures at NXP.

### Key Responsibilities

Architecture Definition: Lead the definition and evolution of MCU SoC architectures aligned with product strategy, market trends, and industry standards.

### Microarchitecture & Compute

Design scalable and efficient multi-core compute architectures optimizing for TCMs, SRAM hierarchy, DMA, interconnect bandwidth.

### Security Architecture

Define and integrate secure boot, root‑of‑trust, isolation, and cryptographic acceleration. Ensure architectures support functional safety and lifecycle requirements.

### SoC Integration

Collaborate with hardware, firmware, and IP teams to ensure seamless integration of processing, memory, power management, peripherals, and interconnect subsystems. Good understanding of Analog IPs (ADC, DAC, PLL, SERDES etc.) will be required.

### Performance & Power Optimization

Lead architectural strategies to optimize performance per watt. Balance frequency, voltage, memory, and power states to meet RT and MCX power envelopes. Support early performance and power estimation to reduce program risk.

### Technical Leadership & Documentation

Develop architecture specifications, best practices, and technical documentation to guide development teams.

### Required Qualifications

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Proven experience in MCU SoC architecture, microarchitecture, RTL design, and/or physical design. Strong understanding of microprocessor and microcontroller architectures, including CPU cores, interconnects, memory management, bus protocols, and peripheral integration. Experience in low-power design and performance optimization.

Familiarity with Ethernet, USB, SPI, and I3C protocols. Strong collaboration skills across silicon, hardware, and software teams.

### Preferred Qualifications

Experience with ARM Cortex‑M architectures Background in power and performance modeling, HW/SW co-design, and debugging
- Knowledge of functional safety and security standards
- Familiarity with Wi‑Fi integration, networking protocols, and secure wireless communication More information about NXP in India... #LI-2734

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 12, 2026
- Last checked: Oct 19, 2026
- Listed for: 7 days
- Location: Pune[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Pune/SoC-Architect_R-10063132-1)

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