[Skip to main content](#main-content)

[OpenNash Jobs](https://jobs.opennash.com/)
[Hiring report](/reports/hiring/) · [All NXP Semiconductors jobs](https://jobs.opennash.com/companies/nxp-semiconductors/) · [Search jobs](/search/)

NXP Semiconductors · Multiple locations

# Senior Design Engr

Multiple locations Senior individual contributor Design 

Listed on NXP Semiconductors’s official careers site. Listed as of October 19, 2026. Check that it is still open and apply there.
[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Noida/SENIOR-DESIGN-ENGR_R-10066061)

[OpenNash Jobs](https://jobs.opennash.com/) / [NXP Semiconductors](https://jobs.opennash.com/companies/nxp-semiconductors/) / Senior Design Engr

## Job description

### Role Overview

Design and Verify high-performance, low-power, high-reliability RISC‑V CPU cores for SoCs used in various edge products like automotive, IoT and mobile. Focus on microarchitecture, pipelining, and PPA (performance/power/area) optimization, with strong emphasis on functional safety and predictable performance. Deliver the first pass success of complex RISC-V CPU IPs using the latest advanced verification languages and methodology.

### Key Responsibilities
- Define and implement CPU microarchitecture (pipeline, execution units, control, ISA features)
- Design efficient pipelined cores with robust hazard handling and latency/throughput optimization Drive PPA trade-offs (frequency, area, power, determinism) across design stages
- Develop and debug RTL (SystemVerilog/Verilog); support verification and bring-up; perform various design checks
- Perform performance analysis / bottleneck identification and drive optimizations
- Collaborate with physical design to meet timing, power, and area targets Code assembly level and C testcases to verify the core Drive (or participate in) the verification signoff using methodologies notably assembly language, UVM, assertions and formal verification.

Carry out a thorough analysis of existing defects, change requests and new features and develop related Testbench components and execute Test plan for the core. Shall be capable to own & perform the complete sign off process for the core modules including 100% Code & Functional Coverage targets, Assertions, writing and updating test plans, Verification Guides, regression management etc. More information about NXP in India... #LI-2734

## At a glance
- Posted by the employer: Not stated
- First seen by OpenNash: Oct 12, 2026
- Last checked: Oct 19, 2026
- Listed for: 7 days
- Location: Multiple locations[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Noida/SENIOR-DESIGN-ENGR_R-10066061)

## More jobs at NXP Semiconductors

### [AI Engineer – Foundational Models with Multi-Modality (Analog IC Design)](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/a9068dbbe545f83f4fbf/)

### [ATE Hardware Design - Principal Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/ab4d01db9cee7f1890da/)

### [Analog Design Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/b36ebcf07b4c77861f68/)

### [Director AI/ML Driven ASIC Design and Implementation Automation](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/bbc0543d60066000b9ed/)

### [Lead Digital design and verification for MixSignal IP/Subsystem](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/8b6d4459ccc8a2324205/)

## Similar jobs at other companies

### [DevSecOps Lead Computer SW Dev Engr IV](https://jobs.opennash.com/companies/leidos/jobs/e6153899bd8d0a958204/)

Leidos 

### [Engr, Env Health & Safety](https://jobs.opennash.com/companies/edwards-lifesciences/jobs/f82f1bef9dba75d9491c/)

Edwards Lifesciences 

### [Mech Design Engr III](https://jobs.opennash.com/companies/honeywell-international/jobs/98dbfce57bff3b197d7a/)

Honeywell International · Gurugram, Haryana, India

### [Sr Advanced Mech Design Engr](https://jobs.opennash.com/companies/honeywell-international/jobs/beb1c7ffa364929c3627/)

Honeywell International · Gurugram, Haryana, India

### [ASIC RTL Design Engineer (Sr. Engr / Sr. Lead Engr](https://jobs.opennash.com/companies/qualcomm/jobs/4ef229954ffd77d7dc88/)

Qualcomm · Bangalore, India

OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)
