[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NXP Semiconductors jobs](https://jobs.opennash.com/companies/nxp-semiconductors/) · [Search jobs](/search/) NXP Semiconductors · Bangalore # Senior Lead Verification Engineer, Digital IP Bangalore Manager or lead Operations Listed on NXP Semiconductors’s official careers site. Listed as of October 19, 2026. Check that it is still open and apply there. [Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Bangalore/Senior-Lead-Verification-Engineer--Digital-IP_R-10066812) [OpenNash Jobs](https://jobs.opennash.com/) / [NXP Semiconductors](https://jobs.opennash.com/companies/nxp-semiconductors/) / Senior Lead Verification Engineer, Digital IP ## Job description ### Role Summary We are part of MCU/MPU Engineering, a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design. MME's Digital IP team produces design solutions covering the very wide range of SoCs required by the business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low-power devices to highly integrated, high-performance, multi-cohort devices compliant with the latest automotive and industrial safety and security standards. ### Job Responsibility Responsible for the pre-silicon verification of IP modules or, IP subsystems Responsible for defining and writing IP verification plans based on requirements documents (industry standards, product requirements, IP architecture and IP implementation specifications) Interface to HW, FW, and SW design teams, as well as to architecture and system engineering teams, to understand functionality and application of the IP or subsystem. Responsible for executing verification plan according to the product specification and verification requirements defined by product architects. Responsible for architecting, developing, debugging and running UVM based verification environment for RTL simulation. Define and develop test cases in an appropriate verification framework. Create stimulus and assertions, run simulation, debug test cases on the design models (RTL, power aware RTL, gate level, FPGA, Emulation platform), run regression, collect and analyze code/functional coverage. ### Job Qualification Degree in Electrical Engineering or Computer Science, with 7+ years of experience on IP/Sub-System Verification Proven experience in testbench design and development using UVM methodology for IP/Subsystem and SOC. Advanced knowledge of Verilog, System Verilog, C/C++, Shell. High proficiency in Metric Driven Verification concepts, functional and code coverage. High proficiency in directed and constrained random methodologies. Good knowledge of formal verification methodologies and assertions. Experience with debugging of designs pre- and post-silicon, in simulation and on the bench. Excellent written and verbal communication skill. Good knowledge in scripting like Perl, TCL or Python is a plus More information about NXP in India... #LI-7013 ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 12, 2026 - Last checked: Oct 19, 2026 - Listed for: 7 days - Location: Bangalore[Apply on NXP Semiconductors’s careers site →](https://nxp.wd3.myworkdayjobs.com/careers/job/Bangalore/Senior-Lead-Verification-Engineer--Digital-IP_R-10066812) ## More jobs at NXP Semiconductors ### [Automotive Embedded Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/0d16415e9611ae03a309/) Bangalore ### [DSP Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/8ad20869aab3cbc2c162/) Bangalore ### [Lead DSP Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/9e6d2618ae57cf6385ad/) Bangalore ### [Lead PDN/EMIR Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/0e423cbf81f024127fb2/) Bangalore ### [Lead STA Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/d4d9a701b1f9d0bfa39a/) Bangalore ## Similar jobs at other companies ### [Staff Engineer Verification -IP Digital Functional Verification](https://jobs.opennash.com/companies/infineon-technologies/jobs/fff24ca2b5893cf8106f/) Infineon Technologies · Bangalore BTP ### [Senior/Staff Engineer - Digital Verification](https://jobs.opennash.com/companies/infineon-technologies/jobs/3ac9faeb80e1dfc274ba/) Infineon Technologies · Hanoi ### [Digital Design Verification Engineer, Staff](https://jobs.opennash.com/companies/qualcomm/jobs/a645ad2a0d00db966bb8/) Qualcomm · Toronto, Ontario, Canada ### [Staff ASIC Digital Engineer (SOC Verification, PCIe) with 8 to 12 years of experience](https://jobs.opennash.com/companies/sandisk/jobs/3d2b2a850dec23a8b655/) Sandisk ### [FY27 Intern - MSIP Digital Design Verification Engineering Internship - Canada (16 months)](https://jobs.opennash.com/companies/qualcomm/jobs/c6a33a55fdf698fb8d47/) Qualcomm · Toronto, Ontario, Canada OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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