[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · China, Shanghai # ASIC Physical Design Engineer China, Shanghai Design Listed on NVIDIA’s official careers site. Posted October 6, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/China-Shanghai/ASIC-Physical-Design-Engineer_JR2026756) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / ASIC Physical Design Engineer ## Job description ASIC-PD team is hiring both junior and senior engineers, whose work scope is physical design from RTL to GSDII: design quality check, synthesis, formal check, partitioning, constraint (for both design and process), async check, timing analysis/fixing/signoff, also all related flow. Join us, you will work together with expertise in all these areas; you will not only work for physical application, but also drive physical friendly design with all related teams: ASIC/P&R/DFT/SI/ARCH etc.; you will work for the most advanced process/technology, the biggest chip in the world. ### What you'll be doing STA for hierarchical design. Constraints creation and validation, timing budget. Timing closure for both partition and full chip level. Special timing closure, such as io, test, clock etc. Synthesis, Netlist quality check, Formal Verification. Implement chip partition and floorplan. Function eco creation. Develop and enhance entire timing closure flow from frontend (pre-layout) to backend (post-layout). Flow automation development, Methodology in any of above areas. ### What we need to see MS in EE, CS or Microelectronics with 1+ year experience is preferred Project experience in IC design implementation. Courses taken in circuit design, digital design Hand-on experience in EDA software from Synopsys (FC/DC/PT/Formality), Cadence (RC compiler/Genus/LEC) is helpful - Proficient user of Python, perl or TCL is helpful - Proficient in English reading and writing Ways to stand out from the crowd: Proficient user of Perl, Python or TCL is preferred. Excellent English communication skill. ## At a glance - Posted by the employer: Oct 6, 2026 - First seen by OpenNash: Oct 13, 2026 - Last checked: Oct 20, 2026 - Listed for: 14 days - Location: China, Shanghai[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/China-Shanghai/ASIC-Physical-Design-Engineer_JR2026756) ## More jobs at NVIDIA ### [ASIC Design Engineer, Clocks](https://jobs.opennash.com/companies/nvidia/jobs/bba710d2899935021389/) China, Shanghai ### [ASIC Design and Verification Intern, SOC - 2027](https://jobs.opennash.com/companies/nvidia/jobs/dfe0815c668f1489c96d/) China, Shanghai ### [ASIC Engineering Intern, Networking Chip Design - 2027](https://jobs.opennash.com/companies/nvidia/jobs/3aa5cff2c3757b77e047/) China, Shanghai ### [ASIC Physical Design Intern - 2027](https://jobs.opennash.com/companies/nvidia/jobs/425b0f972c552cb0a5ba/) China, Shanghai ### [ASIC TOP Floorplan Design Engineer](https://jobs.opennash.com/companies/nvidia/jobs/0aa75f5fe5e602607602/) China, Shanghai ## Similar jobs at other companies ### [ASIC/FPGA Design Verification Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/b9ebab233b8dca4884ac/) Qualcomm · Ottawa, Ontario, Canada ### [ASIC/FPGA Design Verification Engineer, Senior](https://jobs.opennash.com/companies/qualcomm/jobs/f7cc8fb7b0460376d7d6/) Qualcomm · Ottawa, Ontario, Canada ### [Physical Design Engineer II](https://jobs.opennash.com/companies/microsoft/jobs/2d7f9c2e826bc117df12/) Microsoft · India, Karnataka, Bangalore ### [Silicon Physical Design CAD Engineer](https://jobs.opennash.com/companies/microsoft/jobs/d047141045a6e2b56e7a/) Microsoft · India, Karnataka, Bangalore ### [Senior Engineer, Physical Design Engineering (ASIC)](https://jobs.opennash.com/companies/analog-devices/jobs/d6b4dc6bbdcb9230a846/) Analog Devices OpenNash lists jobs from employers’ own careers sites and does not handle applications. Dates come from the employer where stated; “first seen” and “last checked” are our own observations. OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)