[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All NVIDIA jobs](https://jobs.opennash.com/companies/nvidia/) · [Search jobs](/search/) NVIDIA · Santa Clara, CA # Senior Power and Performance Engineer US, CA, Santa Clara Senior individual contributor Operations Listed on NVIDIA’s official careers site. Posted September 24, 2026. Check that it is still open and apply there. [Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Power-and-Performance-Engineer_JR2019066) [OpenNash Jobs](https://jobs.opennash.com/) / [NVIDIA](https://jobs.opennash.com/companies/nvidia/) / Senior Power and Performance Engineer ## Job description NVIDIA's Silicon Co-design Group (SCG) sits at a rare intersection: we own the full product development lifecycle, from early architecture definition through silicon bringup to product release. Our ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. If you want to see your work go from whiteboard to world-class silicon, this is where that happens. ### What You'll Be Doing Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products. Build feature roadmaps to address low-power, low-noise, and performance-per-watt product needs through prototyping, use-case analysis, and cost/benefit trade-offs. Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues. Track industry trends and market needs and translate them into forward-looking roadmaps that keep NVIDIA's products ahead of the curve. Lead debug efforts, develop workarounds, and support bringup, validation, manufacturing, and customer escalations. ### What We Need to See BS or MS in EE/CE (or equivalent experience) with 8+ years in silicon power architecture, system-level design, validation, and power/performance optimization. ### Strong EE fundamentals digital design, low power design, DVFS, control systems, power management, timing, and architecture. Solid understanding of firmware/driver structures and HW/SW interaction. Familiarity with clocking, boot/reset flows, and system architecture is a plus. Hands-on lab experience (oscilloscopes, multimeters, logic analyzers) and silicon bringup exposure are a bonus. Programming proficiency in C/C++, Python, or Perl in Windows/Linux environments. Strong problem-solving, collaboration, and communication skills. ### Ways to Stand Out in a Crowd Demonstrated cross-functional leadership — experience driving alignment across architecture, silicon, firmware, and software teams on complex, ambiguous problems. System-level intuition — the ability to reason about power and performance holistically, not just at the block level, and to translate architectural tradeoffs into clear engineering decisions. AI-assisted engineering fluency — comfort using AI tools (such as Claude, GitHub Copilot, or similar) to accelerate analysis, workflows, generate and review scripts, synthesize technical documentation, and explore solution spaces faster. Candidates who treat AI as a force multiplier for their engineering judgment — rather than a replacement for it — will be well-positioned for how NVIDIA's teams are evolving. Our team is at the forefront of silicon innovation, advancing groundbreaking technologies. We offer a dynamic work environment where your contributions will directly impact the company's success. Join us to advance your career in a role where you can truly make a difference. With competitive salaries and a generous benefits package, we are widely considered one of the technology industry’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us, and due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you! #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until August 14, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. ## At a glance - Posted by the employer: Sep 24, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 20, 2026 - Listed for: 102 days - Location: US, CA, Santa Clara[Apply on NVIDIA’s careers site →](https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Power-and-Performance-Engineer_JR2019066) ## More jobs at NVIDIA ### [ASIC Clocks Verification Engineer - New College Grad 2026](https://jobs.opennash.com/companies/nvidia/jobs/634d881f29a7a2632449/) US, CA, Santa Clara ### [ASIC Verification Engineer](https://jobs.opennash.com/companies/nvidia/jobs/52c13f6335fb98e58de1/) US, CA, Santa Clara ### [ASIC Verification Engineer - New College Grad 2027](https://jobs.opennash.com/companies/nvidia/jobs/9d98fd56c400ae295ad5/) US, CA, Santa Clara ### [ATE Test Development Engineer](https://jobs.opennash.com/companies/nvidia/jobs/bca8e15f7545d3c56e87/) US, CA, Santa Clara ## Similar jobs at other companies ### [Principal Platform Power & Performance Engineer](https://jobs.opennash.com/companies/microsoft/jobs/ffc1c8a2f41bec5d03c8/) Microsoft · United States, Washington, Redmond, Oregon, Hillsboro ### [SoC Infrastructure/NoC, Power & Performance Validation Engineer, Staff](https://jobs.opennash.com/companies/qualcomm/jobs/52befc048876f4acf979/) Qualcomm · Tijuana, Baja California, Mexico ### [SoC Infrastructure/NoC, Power & Performance Validation Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/1ebab5f106be4a5183da/) Qualcomm · San Diego, California, United States of America, Austin, Texas, Folsom, Hillsboro, Oregon, Markham, Ontario, Canada, Santa Clara ### [Power Performance Design Engineer, Powersports](https://jobs.opennash.com/companies/honda-motor/jobs/fc316b20fe89c3545c3b/) Honda Motor · Raymond, Ohio, United States ### [Lead Power Electronics Engineer - Power Conversion](https://jobs.opennash.com/companies/eaton/jobs/597a1a3fd247dfb34f62/) Eaton · Menomonee Falls, Wisconsin, USA OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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